SRAM
AS8SLC512K32
512K x 32 SRAM
SRAM Memory Array MCM
FEATURES
•
•
•
•
•
•
•
•
•
Fast access times: 10, 12, 15, 17 and 20ns
Fast OE\ access times: 6ns
Ultra-low operating power < 1W worst case
Single +3.3V ±0.3V power supply
Fully static -- no clock or timing strobes necessary
All inputs and outputs are TTL-compatible
Easy memory expansion with CE\ and OE\ options
Automatic CE\ power down
High-performance, low-power consumption, CMOS
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
PIN ASSIGNMENT
(Top View)
68 Lead CQFP (Q & Q1)
9
10
NC
A0
A1
A2
A3
A4
A5
CE\3
GND
CE\4
WE\1
A6
A7
A8
A9
A10
Vcc
8
7 6
5
4 3
2 1 68 67 66 65 64 63 62 61
60
59
11
58
12
57
13
56
14
55
15
54
16
53
17
52
18
51
19
50
20
49
21
48
22
47
23
46
24
45
25
44
26
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
•
Timing
10ns
12ns
15ns
17ns
20ns
-10
-12
-15
-17
-20
CS
Vcc
A11
A12
A13
A14
A15
A16
CE\1
OE
CE\2
A17
WE\2
WE\3
WE\4
A18
NC
NC
OPTIONS
MARKINGS
66 Lead PGA (P)
CS
•
Package
Ceramic Quad Flatpack
Q
Ceramic Quad Flatpak(.054min SO) Q1
Pin Grid Array
P
Operating Temperature Ranges
Military (-55
o
C to +125
o
C)
Industrial (-40
o
C to +85
o
C)
2V data retention/low power
No. 702
No.904
CS
\
•
CS
XT
IT
L
•
GENERAL DESCRIPTION
The AS8SLC512K32 is a 3.3V 16 Megabit CMOS SRAM
Module organized as 512Kx32 bits. The AS8SLC512K32 achieves
very high speed access, low powerconsumption and high reliability
by employing advanced CMOS memory technology.
This military temperature grade product is ideally suited for
commercial, industrial, and military applications when asynchronous
high speed switching and low ACTIVE opening power & ultra Fast
Asynchronous Access is mandated.
M4
M3
M2
M1
For more products and information
please visit our web site at
www.micross.com
BLOCK DIAGRAM
AS8SLC512K32
Rev. 2.6 01/10
Micross Components reserves the right to change products or specifications without notice.
1
SRAM
AS8SLC512K32
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss...........-0.5V to +4.6V
Storage Temperature.....................................-65°C to +150°C
Short Circuit Output Current(per I/O)............................20mA
Voltage on Any Pin Relative to Vss............-.5V to Vcc+4.6V
Maximum Junction Temperature**.............................+150°C
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow. See the Ap-
plication Information section at the end of this datasheet for
more information.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< 125
o
C and -40
o
C to +85
o
C; Vcc = 3.3V ±0.3V)
DESCRIPTION
Input High (logic 1) Voltage
Input Low (logic 1) Voltage
Input Leakage Current
ADD,OE
Input Leakage Current
WE,CE
Output Leakage Current
I/O
Output High Voltage
Output Low Voltage
DESCRIPTION
CONDITIONS
CONDITIONS
SYMBOL
V
IH
V
IL
I
LI1
I
LI2
I
LO
V
OH
V
OL
-12
320
MAX
-15
280
-17
260
MIN
2.2
-0.3
-10
-10
-10
2.4
MAX
V
CC
+0.3
0.8
10
10
10
UNITS NOTES
V
V
μA
μA
μA
V
1
1
1
1
0V<V
IN
<V
CC
Output(s) Disabled
0V<V
OUT
<V
CC
I
OH
=-4.0mA
I
OL
=8.0mA
SYMBOL
-10
350
0.5
-20
240
UNITS NOTES
V
CS\<V
IL
; V
CC
= MAX
High Speed
f = MAX = 1/ t
RC
(MIN)
Power Supply
Current: Operating Outputs Open, OE\ = V
IH
Low Power (L)
Low Speed
Power Supply
Current: Operating
Low Speed
Power Supply
Current: Operating
CS\<V
IL
; V
CC
= MAX
f = 10 MHz, OE\ = V
IH
Low Power (L)
CS\<V
IL
; V
CC
= MAX
f = 1 MHz, OE\ = V
IH
Low Power (L)
CS\>V
IH
; V
CC
= MAX
Power Supply
Current: Standby
f = MAX = 1/ t
RC
(MIN)
Outputs Open, OE\=V
IH
Low Power (L)
V
IN
= V
CC
- 0.2V, or V
SS
+0.2V
V
CC
=Max; f = 0Hz
Low Power (L)
AS8SLC512K32
Rev. 2.6 01/10
I
CC1
mA
2, 3,13
280
I
CC2
---
120
---
80
240
---
80
---
40
200
---
80
---
40
180
---
80
---
40
160
---
80
---
40
mA
2
I
CC3
mA
2
I
SBT1
100
80
80
50
80
60
60
36
80
60
60
36
80
60
60
36
80
60
60
36
mA
3, 13
CMOS Standby
I
SBT2
mA
Micross Components reserves the right to change products or specifications without notice.
2
SRAM
AS8SLC512K32
CAPACITANCE
(V
IN
= 0V, f = 1MHz, T
A
= 25
o
C)*
SYMBOL
C
ADD
C
OE
C
WE,
C
CS
C
IO
PARAMETER
A0 - A18 Capacitance
OE\ Capacitance
WE\ and CS\ Capacitance
I/O 0- I/O 31 Capacitance
MAX
40
40
12
15
UNITS
pF
pF
pF
pF
NOTE:
*This parameter is sampled.
AC TEST CONDITIONS
TEST SPECIFICATIONS
Input pulse levels...........................................V
SS
to 3V
Input rise and fall times...........................................1ns/V
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..........................................See Figure 1, 2
3.3V
R
L
= 50Ω
Q
Z
O
= 50Ω
30 pF
V
L
= 1.5V
Q
333Ω
5 pF
319Ω
FIGURE 1
FIGURE 2
AS8SLC512K32
Rev. 2.6 01/10
Micross Components reserves the right to change products or specifications without notice.
3
SRAM
AS8SLC512K32
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55
o
C<T
A
< 125
o
C and -40
o
C to +85
o
C; V
CC
= 3.3V ±0.3V)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip select access time
Output hold from address change
Chip select to output in Low-Z
Chip select to output in High-Z
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip select to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width, CS\ controlled
WRITE pulse width, WE\ controlled
Data setup time
Data hold time
Write disable to output in Low-z
Write enable to output in High-Z
SYMBOL
RC
AA
t
ACS
t
OH
t
LZCS
t
HZCS
t
AOE
t
LZOE
t
HZOE
t
t
-10
MIN MAX
10
10
10
1
1
0
0
5
5
5
10
7
7
0
0
9
9
5
1
2
5
-12
MIN MAX
12
12
12
2
2
0
0
6
6
6
12
8
8
0
0
10
10
6
1
2
5
-15
MIN MAX
15
15
15
2
2
0
0
7
7
-17
MIN MAX
17
17
17
2
2
7.5
7.5
0
7.5
17
11
11
0
0
14
14
7.5
1
2
6.5
-20
UNITS NOTES
MIN MAX
20
20
20
2
2
0
0
8
8
8
20
12
12
0
0
15
15
8
1
2
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4,6,7
4,6,7
4,6
4,6
7
15
10
10
0
0
12
12
7
1
2
6
WC
CW
t
AW
t
AS
t
AH
t
WP1
t
WP2
t
DS
t
DH
t
LZWE
t
HZWE
t
t
4,6,7
4,6,7
AS8SLC512K32
Rev. 2.6 01/10
Micross Components reserves the right to change products or specifications without notice.
4
SRAM
AS8SLC512K32
LOW POWER CHARACTERISTICS (L Version Only)
DESCRIPTION
V
CC
for Retention Data
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
CONDITIONS
All Inputs @ Vcc + 0.2V
or Vss + 0.2V,
CS\ = Vcc + 0.2V
V
CC
= 2V
V
CC
= 3V
SYMBOL
V
DR
I
CCDR
I
CCDR
t
CDR
t
R
0
20
MIN
2
MAX
24
32
UNITS
V
mA
mA
ns
ms
4
4, 11
NOTES
LOW V
CC
DATA RETENTION WAVEFORM
DATA RETENTION MODE
V
CC
4.5V
V
DR
> 2V
t
4.5V
CDR
t
R
CS\ 1-4
V
DR
NOTES
1. All voltages referenced to V
SS
(GND).
2. Worst case address switching.
3. I
CC
is dependent on output loading and cycle rates.
unloaded, and f=
1
t RC(MIN) H
Z.
7. At any given temperature and voltage condition,
t
HZCS
, is less than t
LZCS
, and t
HZWE
is less than t
LZWE
.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
10. Address valid prior to or coincident with latest
oc-
curring chip enable.
11. t
RC
= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate
and terminate a WRITE cycle.
13. I
CC
is for full 32 bit mode.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 & 2 unless otherwise noted.
6. t
HZCS
, t
HZOE
and t
HZWE
are specified with C
L
= 5pF as in
Fig. 2. Transition is measured +/- 200 mV typical from
steady state voltage, allowing for actual tester RC time
constant.
AS8SLC512K32
Rev. 2.6 01/10
Micross Components reserves the right to change products or specifications without notice.
5
FPGA/CPLD
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