LTC4253A-ADJ
– 48V Hot Swap Controller
with Sequencer
FEATURES
■
■
■
■
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■
■
■
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■
DESCRIPTIO
Allows Safe Board Insertion and Removal from a
Live – 48V Backplane
Floating Topology Permits Very High Voltage
Operation
Adjustable Analog Current Limit with Breaker Timer
Fast Response Time Limits Peak Fault Current
Adjustable Undervoltage/Overvoltage Protection
with
±1%
Threshold Accuracy
Three Sequenced Power Good Outputs
Adjustable Soft-Start Current Limit
Adjustable Timer with Drain Voltage Accelerated
Response
Latchoff After Fault
Available in 20-Pin SSOP and 20-Pin (4mm
×
4mm)
QFN Packages
The LTC
®
4253A-ADJ negative voltage Hot Swap
TM
con-
troller allows a board to be safely inserted and removed
from a live backplane. Output current is controlled by three
stages of current-limiting: a timed circuit breaker, active
current limiting and a fast feedforward path that limits
peak current under worst-case catastrophic fault condi-
tions. The LTC4253A-ADJ latches off after a circuit fault.
Undervoltage and overvoltage detectors with adjustable
thresholds and hystereses disconnect the load whenever
the input supply exceeds the desired operating range. The
LTC4253A-ADJ’s supply input is shunt-regulated, allowing
safe operation with very high supply voltages. A multifunc-
tion timer delays initial start-up and controls the circuit
breaker’s response time. The circuit breaker’s response
time can be accelerated by sensing excessive MOSFET drain
voltage. An adjustable soft-start circuit controls MOSFET
inrush current at start-up.
Three power good outputs can be sequenced to enable
external power modules at start-up or disable them if the
circuit breaker trips. The LTC4253A-ADJ is available in
20-pin SSOP and 20-pin (4mm
×
4mm) QFN packages.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners. Patent pending.
APPLICATIO S
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– 48V Distributed Power Systems
Negative Power Supply Control
Central Office Switching
High Availability Servers
Disk Arrays
TYPICAL APPLICATIO
– 48V RTN
– 48V RTN
1µF
255k
1%
10nF
EN2 EN3 V
IN
LTC4253A-ADJ
RESET
UVL
UV
OVL
0.536k
1%
20k
1%
– 48V A
B3100*
OV
33nF
0.1µF
0.68µF
SS
SQTIMER
GATE
TIMER
SEL
SENSE
V
EE
PWRGD1
PWRGD2
PWRGD3
DRAIN
– 48V/2.5A Hot Swap Controller
2.5k
15k(1/4W)/6
5.6k
V
IN
5.6k
+
100µF
5.6k
LOAD1
LOAD2
EN
EN
EN
LOAD3
1.24k
1%
2.1k
1%
†
†
†
4253A TA01
1M
IRF530S
†
MOC207
*DIODES, INC.
10Ω
10nF
0.02Ω
– 48V B
B3100*
U
Start-Up Behavior
GATE
10V
SS
1V
SENSE
50mV
V
OUT
50V
1ms/DIV
4253A TA01b
U
U
4253a-adjf
1
LTC4253A-ADJ
ABSOLUTE
AXI U RATI GS
Current into V
IN
(100µs Pulse) ........................... 100mA
Current into DRAIN (100µs Pulse) ........................ 20mA
V
IN
, DRAIN Minimum Voltage............................... – 0.3V
Input/Output (Except SENSE
and DRAIN) Voltage ...................................– 0.3V to 16V
SENSE Voltage ..........................................– 0.6V to 16V
Current Out of SENSE (20µs Pulse) .................. – 200mA
Maximum Junction Temperature .......................... 125°C
PACKAGE/ORDER I FOR ATIO
TOP VIEW
EN2
PWRGD2
PWRGD1
V
IN
RESET
SS
SEL
SENSE
V
EE
1
2
3
4
5
6
7
8
9
20 PWRGD3
19 EN3
18 SQTIMER
17 TIMER
16 UVL
15 UV
14 OVL
13 OV
12 DRAIN
11 GATE
PWRGD1
PWRGD2
PWRGD3
EN2
LTC4253ACGN-ADJ
LTC4253AIGN-ADJ
EN3
ORDER PART
NUMBER
DRAIN
GATE
NC
V
EE
OV
V
EE
10
GN PACKAGE
20-LEAD PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 95°C/W
Order Options
Tape and Reel: Add #TR, Lead Free: Add #PBF, Lead Free Tape and Reel: Add #TRPBF, Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2)
SYMBOL
V
Z
R
Z
I
IN
V
LKO
V
LKH
V
IH
V
IL
V
HYST
I
RESET
I
EN
PARAMETER
V
IN
– V
EE
Zener Voltage
V
IN
– V
EE
Zener Dynamic Impedance
V
IN
Supply Current
V
IN
Undervoltage Lockout
V
IN
Undervoltage Lockout Hysteresis
TTL Input High Voltage
TTL Input Low Voltage
TTL Input Buffer Hysteresis
RESET Input Current
EN2, EN3 Input Current
V
EE
≤
V
RESET
≤
V
IN
V
EN
= 4V (Sinking)
V
EN
= 0V
●
●
●
ELECTRICAL CHARACTERISTICS
CONDITIONS
I
IN
= 2mA
I
IN
= (2mA to 30mA)
UV = UVL = OV = OVL = 4V, V
IN
= (V
Z
– 0.3V)
Coming Out of UVLO (Rising V
IN
)
●
●
●
●
●
●
2
U
U
W
W W
U
W
(Note 1) All voltages referred to V
EE
Operating Temperature Range
LTC4253A-ADJC ..................................... 0°C to 70°C
LTC4253A-ADJI .................................. – 40°C to 85°C
Storage Temperature Range
SSOP ................................................ – 65°C to 150°C
QFN .................................................. – 65°C to 125°C
Lead Temperature (Soldering, 10 sec)
SSOP ................................................................ 300°C
TOP VIEW
ORDER PART
NUMBER
LTC4253ACUF-ADJ
LTC4253AIUF-ADJ
20 19 18 17 16
V
IN
1
RESET 2
SS 3
SEL 4
SENSE 5
6
7
8
9 10
21
15 SQTIMER
14 TIMER
13 UVL
12 UV
11 OVL
UF PART
MARKING*
253AJ
UF PACKAGE
20-LEAD (4mm
×
4mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 37°C/W
EXPOSED PAD (PIN 21) IS V
EE
MUST BE SOLDERED TO PCB
MIN
11.5
TYP
13
5
1.1
9
MAX
14.5
2
10
0.75
0.8
UNITS
V
Ω
mA
V
V
V
V
mV
µA
µA
µA
4253a-adjf
0.25
2
0.5
600
±0.1
60
120
±0.1
±10
180
±10
LTC4253A-ADJ
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2)
SYMBOL
I
SEL
V
CB
V
ACL
V
CB
V
FCL
V
SS
I
SS
PARAMETER
SEL Input Current
Circuit Breaker Current Limit Voltage
Analog Current Limit Voltage x%
Circuit Breaker Current Limit Voltage
Fast Current Limit Voltage
SS Voltage
SS Pin Current
CONDITIONS
V
SEL
= 0V (Sourcing)
V
SEL
= V
IN
V
CB
= (V
SENSE
– V
EE
)
V
ACL
= (V
SENSE
– V
EE
), SS = Open or 1.4V
V
FCL
= (V
SENSE
– V
EE
)
After End of SS Timing Cycle
UV = UVL = OV = OVL = 4V,
V
SENSE
= V
EE,
V
SS
= 0V (Sourcing)
UV = UVL = OV = OVL = 0V,
V
SENSE
= V
EE,
V
SS
= 1V (Sinking)
R
SS
V
OS
V
ACL
+ V
OS
V
SS
I
GATE
SS Output Impedance
Analog Current Limit Offset Voltage
Ratio (V
ACL
+ V
OS
) to SS Voltage
GATE Pin Output Current
UV = UVL = OV = OVL = 4V, V
SENSE
= V
EE
,
V
GATE
= 0V (Sourcing)
UV = UVL = OV = OVL = 4V, V
SENSE
– V
EE
= 0.15V,
V
GATE
= 3V (Sinking)
UV = UVL = OV = OVL = 4V, V
SENSE
– V
EE
= 0.3V,
V
GATE
= 1V (Sinking)
V
GATE
V
GATEL
V
GATEH
V
UVHI
V
UVLO
V
OVHI
V
OVLO
I
SENSE
I
INP
V
TMRH
V
TMRL
I
TMR
External MOSFET Gate Drive
Gate Low Threshold
Gate High Threshold
UV Pin Threshold
UVL Pin Threshold
OV Pin Threshold
OVL Pin Threshold
SENSE Pin Input Current
UV, UVL, OV, OVL Pin Input Current
TIMER Pin Voltage High Threshold
TIMER Pin Voltage Low Threshold
TIMER Pin Current
Timer On (Initial Cycle/Latchoff, Sourcing), V
TMR
= 2V
Timer Off (Initial Cycle, Sinking), V
TMR
= 2V
Timer On (Circuit Breaker, Sourcing,
I
DRN
= 0µA), V
TMR
= 2V
Timer On (Circuit Breaker, Sourcing,
I
DRN
= 50µA), V
TMR
= 2V
Timer Off (Circuit Breaker, Sinking), V
TMR
= 2V
∆I
TMRACC
∆I
DRN
V
SQTMRH
V
SQTMRL
(I
TMR
at I
DRN
= 50µA – I
TMR
at I
DRN
= 0µA)
50µA
SQTIMER Pin Voltage High Threshold
SQTIMER Pin Voltage Low Threshold
Timer On (Circuit Breaker with I
DRN
= 50µA)
●
●
●
●
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
10
45
105
150
1.25
16
TYP
20
±0.1
50
120
200
1.4
28
28
50
10
0.05
MAX
40
±10
55
138
300
1.55
40
UNITS
µA
µA
mV
%
mV
V
µA
mA
kΩ
mV
V/V
30
50
17
190
70
µA
mA
mA
V
GATE
– V
EE,
I
IN
= 2mA
(Before Gate Ramp Up)
V
GATEH
= V
IN
– V
GATE
,
For PWRGD1, PWRGD2, PWRGD3 Status
UV Low to High
UVL High to Low
OV Low to High
OVL High to Low
UV = UVL = OV = OVL = 4V
●
10
12
0.5
2.8
V
Z
V
V
V
●
●
●
●
●
●
●
●
3.05
3.05
5.04
5.025
3.08
3.08
5.09
5.08
15
±0.1
3.11
3.11
5.14
5.135
30
±1
4.5
1.2
7
280
V
V
V
V
µA
µA
V
V
µA
mA
µA
µA
UV = UVL = OV = OVL = 4V, V
SENSE
= 50mV (Sourcing)
●
3.5
0.8
3
120
4
1
5
28
200
600
3
7
3.5
5
8
4
0.33
7
9
4.5
µA
µA/µA
V
V
4253a-adjf
3
LTC4253A-ADJ
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2)
SYMBOL
I
SQTMR
PARAMETER
SQTIMER Pin Current
CONDITIONS
SQTIMER On (Power Good Sequence, Sourcing),
V
SQTMR
= 2V
SQTIMER On (Power Good Sequence, Sinking),
V
SQTMR
= 2V
V
DRNL
I
DRNL
V
DRNCL
V
PGL
I
PGH
t
SQ
t
SS
t
PLLUG
t
PHLOG
DRAIN Pin Voltage Low Threshold
DRAIN Leakage Current
DRAIN Pin Clamp Voltage
PWRGD1, PWRGD2, PWRGD3 Signals
Output Low Voltage
PWRGD1, PWRGD2, PWRGD3
Output High Current
SQ Timer Default Ramp Period
SS Default Ramp Period
UV Low to GATE Low
OV High to GATE Low
For PWRGD1, PWRGD2, PWRGD3 Status
V
DRAIN
= 4V
I
DRN
= 50µA
I
PG
= 1.6mA
I
PG
= 5mA
V
PG
= 0V (Sourcing)
SQTIMER Pin Floating,
V
SQTMR
Ramps from 0.5V to 3.5V
SS Pin Floating, V
SS
Ramps from 0.2V to 1.25V
●
●
●
●
●
●
●
●
ELECTRICAL CHARACTERISTICS
MIN
3
TYP
5
28
MAX
7
UNITS
µA
mA
2
5
2.39
±0.1
6
0.25
3
±1
7.5
0.4
1.2
70
V
µA
V
V
V
µA
µs
µs
30
50
250
140
1
1
5
5
µs
µs
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to V
EE
unless otherwise
specified.
TYPICAL PERFOR A CE CHARACTERISTICS
V
Z
vs Temperature
14.5
I
IN
= 2mA
14.0
I
IN
(mA)
10
I
IN
(mA)
13.5
V
Z
(V)
13.0
12.5
12.0
–50
–25
50
25
0
75
TEMPERATURE (°C)
4
U W
100
125
4253A G01
I
IN
vs V
IN
1000
T
A
= 125°C
T
A
= 85°C
T
A
= 25°C
T
A
= –40°C
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
I
IN
vs Temperature
V
IN
= V
Z
– 0.3V
100
1
0.1
0
5
10
V
IN
(V)
15
20
4253A G02
0.5
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
4253A G03
4253a-adjf
LTC4253A-ADJ
TYPICAL PERFOR A CE CHARACTERISTICS
I
EN
vs V
EN
and I
SEL
vs V
SEL
200
55
I
IN
= 2mA
T
A
= 25°C
I
EN
160
I
EN
/I
SEL
(µA)
V
CB
(mV)
120
50
49
48
V
ACL
(mV)
80
40
I
SEL
0
0
2
4
6
8 10 12
V
EN
/V
SEL
(V)
14
16
18
Fast Current Limit Voltage V
FCL
vs Temperature
250
240
230
220
V
FCL
(mV)
I
GATE
(µA)
I
IN
= 2mA
200
190
180
170
160
150
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
50
48
46
44
42
40
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
I
GATE
(mA)
210
I
GATE
(FCL, Sink) vs Temperature
250
14.5
14.0
200
I
GATE
(mA)
12.5
12.0
11.5
11.0
10.5
V
GATEL
(V)
V
GATE
(V)
150
100
I
IN
= 2mA
UV/UVL/OV/OVL = 4V
TIMER = 0V
V
SENSE
– V
EE
= 0.3V
V
GATE
= 1V
50
25
0
75
TEMPERATURE (°C)
100
125
50
0
–50 –25
U W
4253A G04
Circuit Breaker Current Limit
Voltage V
CB
vs Temperature
54
53
52
51
I
IN
= 2mA
Analog Current Limit Voltage V
ACL
vs Temperature
80
75
70
65
60
55
50
45
IIN = 2mA
47
46
45
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
40
–50 –25
0
50
75
25
TEMPERATURE (°C)
100
125
4253A G05
4253A G06
I
GATE
(Source) vs Temperature
60
58
56
54
52
I
IN
= 2mA
UV/UVL/OV/OVL = 4V
TIMER = 0V
V
SENSE
= V
EE
V
GATE
= 0V
I
GATE
(ACL, Sink) vs Temperature
30
25
20
15
10
5
0
–50 –25
I
IN
= 2mA
UV/UVL/OV/OVL = 4V
TIMER = 0V
V
SENSE
– V
EE
= 0.15V
V
GATE
= 3V
50
25
75
0
TEMPERATURE (°C)
100
125
4253A G07
4253A G08
4253A G09
V
GATE
vs Temperature
I
IN
= 2mA
UV/UVL/OV/OVL = 4V
TIMER = 0V
V
SENSE
= V
EE
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
–25
0
25
50
75
TEMPERATURE (°C)
100
125
V
GATEL
vs Temperature
I
IN
= 2mA
UV/UVL/OV/OVL = 4V
TIMER = 0V
GATE THRESHOLD
BEFORE RAMP UP
13.5
13.0
10.0
–50
0
–50 –25
50
25
0
75
TEMPERATURE (°C)
100
125
4253A G10
4253A G11
4253A G12
4253a-adjf
5
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