LTC3568
1.8A, 4MHz, Synchronous
Step-Down DC/DC Converter
FEATURES
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DESCRIPTION
The LTC
®
3568 is a constant frequency, synchronous
step- down DC/DC converter. Intended for medium power
applications, it operates from a 2.5V to 5.5V input voltage
range and has a user configurable operating frequency
up to 4MHz, allowing the use of tiny, low cost capacitors
and inductors 2mm or less in height. The output voltage
is adjustable from 0.8V to 5V. Internal sychronous 0.11Ω
power switches with 2.4A peak current ratings provide
high efficiency. The LTC3568’s current mode architecture
and external compensation allow the transient response
to be optimized over a wide range of loads and output
capacitors.
The LTC3568 can be configured for automatic power sav-
ing Burst Mode operation to reduce gate charge losses
when the load current drops below the level required for
continuous operation. For reduced noise and RF interfer-
ence, the SYNC/MODE pin can be configured to skip pulses
or provide forced continuous operation.
To further maximize battery life, the P-channel MOSFET
is turned on continuously in dropout (100% duty cycle)
with a low quiescent current of 60μA. In shutdown, the
device draws <1μA.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst
Mode is a registered trademark of Linear Technology Corporation. All other trademarks are
the property of their respective owners. Protected by U.S. Patents including 5481178,
6580258, 6304066, 6127815, 6611131.
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Uses Tiny Capacitors and Inductor
High Frequency Operation: Up to 4MHz
Low R
DS(ON)
Internal Switches: 0.110Ω
High Efficiency: Up to 96%
Stable with Ceramic Capacitors
Current Mode Operation for Excellent Line
and Load Transient Response
Short-Circuit Protected
Low Dropout Operation: 100% Duty Cycle
Low Shutdown Current: I
Q
≤ 1μA
Low Quiescent Current: 60μA
Output Voltages from 0.8V to 5V
Selectable Burst Mode
®
Operation
Sychronizable to External Clock
Small 3mm
×
3mm, 10-Lead DFN Package
APPLICATIONS
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Notebook Computers
Digital Cameras
Cellular Phones
Handheld Instruments
Board Mounted Power Supplies
TYPICAL APPLICATION
V
IN
2.5V TO 5.5V
22μF
V
IN
SYNC/MODE
PGOOD
LTC3568
I
TH
13k
1000pF
324k
SHDN/R
T
SGND
PGND
412k
V
FB
PV
IN
SV
IN
SW
887k
L1
2μH
Efficiency vs Load Current
100
95
EFFICIENCY
POWER LOSS (mW)
EFFICIENCY (%)
90
85
POWER LOSS
80
75
70
1
V
IN
= 3.3V
V
OUT
= 2.5V
f
O
= 1MHz
Burst Mode
OPERATION
10
100
1000
LOAD CURRENT (mA)
10
100
1000
V
OUT
2.5V/1.8A
22μF + 10μF
NOTE: IN DROPOUT, THE OUTPUT TRACKS
THE INPUT VOLTAGE
3568 F01
1
10000
Figure 1. Step-Down 1.8A Regulator
3568 TA01
3568f
1
LTC3568
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PACKAGE/ORDER INFORMATION
TOP VIEW
SHDN/R
T
SYNC/MODE
SGND
SW
PGND
1
2
3
4
5
11
10 I
TH
9 V
FB
8 PGOOD
7 SV
IN
6 PV
IN
PV
IN
, SV
IN
Voltages .................................... –0.3V to 6V
V
FB
, I
TH
, SHDN/R
T
Voltages ......... –0.3V to (V
IN
+ 0.3V)
SYNC/MODE Voltage .................... –0.3V to (V
IN
+ 0.3V)
SW Voltage ................................. –0.3V to (V
IN
+ 0.3V)
PGOOD Voltage ........................................... –0.3V to 6V
Operating Ambient Temperature Range
(Note 2) ............................................... –40°C to 85°C
Junction Temperature (Notes 5, 8) ...................... 125°C
Storage Temperature Range................... –65°C to 125°C
DD PACKAGE
10-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W,
θ
JC
= 3°C/W
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
LTC3568EDD
DD PART MARKING
LCSG
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN
I
FB
V
FB
ΔV
LINEREG
ΔV
LOADREG
g
m(EA)
I
S
PARAMETER
Operating Voltage Range
Feedback Pin Input Current
Feedback Voltage
Reference Voltage Line Regulation
Output Voltage Load Regulation
Error Amplifier Transconductance
Input DC Supply Current (Note 4)
Active Mode
Sleep Mode
Shutdown
Shutdown Threshold High
Active Oscillator Resistor
Oscillator Frequency
Synchronization Frequency
Peak Switch Current Limit
Top Switch On-Resistance (Note 6)
Bottom Switch On-Resistance (Note 6)
I
SW(LKG)
V
UVLO
Switch Leakage Current
Undervoltage Lockout Threshold
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.3V, R
T
= 324k unless otherwise specified. (Note 2)
CONDITIONS
(Note 3)
(Note 3)
V
IN
= 2.25V to 5V
I
TH
= 0.36, (Note 3)
I
TH
= 0.84, (Note 3)
I
TH
Pin Load = ±5μA (Note 3)
V
FB
= 0.75V, SYNC/MODE = 3.3V
V
SYNC/MODE
= 3.3V, V
FB
= 1V
V
SHDN/RT
= 3.3V
●
●
●
MIN
2.25
0.784
TYP
MAX
5.5
±0.1
UNITS
V
μA
V
%/V
%
%
μS
0.8
0.04
0.02
–0.02
800
240
62
0.1
V
IN
– 0.6
324k
0.816
0.2
0.2
–0.2
350
100
1
V
IN
– 0.4
1M
1.15
4
4
4
0.15
0.15
1
2.25
μA
μA
μA
V
Ω
MHz
MHz
MHz
A
Ω
Ω
μA
V
V
SHDN/RT
f
OSC
f
SYNC
I
LIM
R
DS(ON)
R
T
= 324k
(Note 7)
(Note 7)
I
TH
= 1.3
V
IN
= 3.3V
V
IN
= 3.3V
V
IN
= 6V, V
ITH/RUN
= 0V, V
FB
= 0V
V
IN
Ramping Down
0.85
0.4
2.4
1
3
0.11
0.11
0.01
2
3568f
2
LTC3568
ELECTRICAL CHARACTERISTICS
PGOOD
RPGOOD
Power Good Threshold
Power Good Pull-Down On-Resistance
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 3.3V, R
T
= 324k unless otherwise specified. (Note 2)
V
FB
Ramping Up, SHDN/R
T
= 1V
V
FB
Ramping Down, SHDN/R
T
= 1V
6.8
–7.6
118
200
%
%
Ω
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC3568 is guaranteed to meet specified performance from
0°C to 85°C. Specifications over the –40°C to 85°C operating ambient
termperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3:
The LTC3568 is tested in a feedback loop which servos V
FB
to the
midpoint for the error amplifier (V
ITH
= 0.6V).
Note 4:
Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5:
T
J
is calculated from the ambient T
A
and power dissipation P
D
according to the following formula:
T
J
= T
A
+ (P
D
• 43°C/W)
Note 6:
Switch on-resistance is guaranteed by correlation to wafer level
measurements.
Note 7:
4MHz operation is guaranteed by design but not production tested
and is subject to duty cycle limitations (see Applications Information).
Note 8:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
TYPICAL PERFORMANCE CHARACTERISTICS
Burst Mode Operation
V
OUT
10mV/
DIV
S
W
2V/DIV
I
L
500mA/
DIV
V
IN
= 3.3V
V
OUT
= 2.5V
I
LOAD
= 100mA
10μs/DIV
3568 G01
Pulse Skipping Mode
V
OUT
10mV/
DIV
S
W
2V/DIV
V
OUT
10mV/
DIV
Forced Continuous Mode
S
W
2V/DIV
I
L
200mA/
DIV
V
IN
= 3.3V
V
OUT
= 2.5V
I
LOAD
= 100mA
2μs/DIV
3568 G02
I
L
500mA/
DIV
V
IN
= 3.3V
V
OUT
= 2.5V
I
LOAD
= 100mA
2μs/DIV
3568 G03
Efficiency vs Load Current
100
95
EFFICIENCY (%)
EFFICIENCY (%)
90
85
80
75
70
100
Burst Mode
OPERATION
95
90
85
80
75
70
65
Efficiency vs V
IN
I
OUT
= 500mA
V
OUT
100mV/
DIV
I
OUT
= 1.8A
Load Step
PULSE SKIP
FORCED CONTINUOUS
V
IN
= 3.3V
V
OUT
= 2.5V
CIRCUIT OF FIGURE 7
I
L
1A/
DIV
V
OUT
= 2.5V
CIRCUIT OF FIGURE 7
3.0
3.5
4.0 4.5
V
IN
(V)
5.0
5.5
6.0
V
IN
= 3.3V
50μs/DIV
V
OUT
= 2.5V
I
LOAD
= 180mA TO 1.8A
3568 G06
1
10
100
1000
LOAD CURRENT (mA)
10000
3568 G04
60
2.5
3568 G05
3568f
3
LTC3568
TYPICAL PERFORMANCE CHARACTERISTICS
Load Regulation
0.6
0.5
0.4
V
OUT
ERROR (%)
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
1
10
100
1000
LOAD CURRENT (mA)
10000
3568 G07
Line Regulation
0.20
10
V
OUT
= 1.8V
0.15
0.10
V
OUT
ERROR (%)
0.05
0
–0.05
–0.10
–0.15
–0.20
2.0
2.5
3.0
3.5
4.0 4.5
V
IN
(V)
5.0
5.5
6.0
I
OUT
= 1.8A
I
OUT
= 500mA
FREQUENCY VARIATION (%)
8
6
4
2
0
–2
–4
–6
–8
–10
V
IN
= 3.3V
V
OUT
= 1.8V
Frequency vs V
IN
V
OUT
= 1.8V
I
OUT
= 1.25A
T
A
= 25°C
Burst Mode
OPERATION
PULSE SKIP
FORCED
CONTINUOUS
2
3
4
V
IN
(V)
5
6
3568 G09
3568 G08
Frequency Variation
vs Temperature
10
8
REFERENCE VARIATION (%)
6
4
2
0
–2
–4
–6
–8
–10
–50
–25
0
25
50
75
TEMPERATURE (°C)
100
125
85
EFFICIENCY (%)
95
100
Efficiency vs Frequency
V
IN
= 3.3V
V
OUT
= 2.5V
I
OUT
= 500mA
T
A
= 25°C
90
0
1
2
3
FREQUENCY (MHz)
4
3568 G11
3568 G10
R
DS(ON)
vs V
IN
120
T
A
= 25°C
115
110
SYNCHRONOUS SWITCH
R
DS(ON)
105
MAIN SWITCH
100
95
90
2.5
160
150
140
130
120
110
100
90
80
70
3
3.5
4
4.5
V
IN
(V)
5
5.5
6
R
DS(ON)
vs Temperature
V
IN
= 2.5V
V
IN
= 3.3V
R
DS(ON)
(mΩ)
V
IN
= 5V
60
–50
MAIN SWITCH
SYNCHRONOUS SWITCH
–25
0
25
50
75
TEMPERATURE (°C)
100
125
3568 G12
3568 G13
3568f
4
LTC3568
PIN FUNCTIONS
SHDN/R
T
(Pin 1):
Combination Shutdown and Timing
Resistor Pin. The oscillator frequency is programmed by
connecting a resistor from this pin to ground. Forcing
this pin to SV
IN
causes the device to be shut down. In
shutdown all functions are disabled.
SYNC/MODE (Pin 2):
Combination Mode Selection and
Oscillator Synchronization Pin. This pin controls the op-
eration of the device. When tied to SV
IN
or SGND, Burst
Mode operation or pulse skipping mode is selected,
respectively. If this pin is held at half of SV
IN
, the forced
continuous mode is selected. The oscillation frequency
can be syncronized to an external oscillator applied to
this pin. When synchronized to an external clock pulse
skip mode is selected.
SGND (Pin 3):
The Signal Ground Pin. All small signal
components and compensation components should be con-
nected to this ground (see Board Layout Considerations).
SW (Pin 4):
The Switch Node Connection to the Inductor.
This pin swings from PV
IN
to PGND.
PGND (Pin 5):
Main Power Ground Pin. Connect to the
(–) terminal of C
OUT
, and (–) terminal of C
IN
.
PV
IN
(Pin 6):
Main Supply Pin. Must be closely decoupled
to PGND.
SV
IN
(Pin 7):
The Signal Power Pin. All active circuitry
is powered from this pin. Must be closely decoupled to
SGND. SV
IN
must be greater than or equal to PV
IN
.
PGOOD (Pin 8): The Power Good Pin. This common drain
logic output is pulled to SGND when the output voltage is
not within ±7.5% of regulation.
V
FB
(Pin 9):
Receives the feedback voltage from the ex-
ternal resistive divider across the output. Nominal voltage
for this pin is 0.8V.
I
TH
(Pin 10):
Error Amplifier Compensation Point. The cur-
rent comparator threshold increases with this control volt-
age. Nominal voltage range for this pin is 0V to 1.5V.
Exposed Pad (Pin 11):
Thermal Ground. Connect to SGND
and solder to the PCB for rated thermal performance.
BLOCK DIAGRAM
SV
IN
7
0.8V
SGND
3
I
TH
10
PMOS CURRENT
COMPARATOR
PV
IN
6
VOLTAGE
REFERENCE
I
TH
LIMIT
BCLAMP
+
–
+
–
V
FB
9
–
ERROR
AMPLIFIER
V
B
+
BURST
COMPARATOR
HYSTERESIS = 80mV
OSCILLATOR
SLOPE
COMPENSATION
4 SW
0.74V
+
–
+
0.86V
PGOOD 8
+
LOGIC
NMOS
COMPARATOR
–
–
–
+
5 PGND
REVERSE
COMPARATOR
1
SHDN/R
T
2
SYNC/MODE
3568 BD
3568f
5
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