FEATURES
n
n
n
LTC6410-6
Low Distortion, Low Noise
Differential IF Amplifier with
Configurable Input Impedance
DESCRIPTION
The LTC
®
6410-6 is a low distortion, low noise differential
IF amplifier with configurable input impedance designed
for use in applications from DC to 1.4GHz. The LTC6410-6
has 6dB of voltage gain. The LTC6410-6 is an excellent
choice for interfacing active mixers to SAW filters. It fea-
tures an active input termination that allows a customized
input impedance for an optimum interface to differential
active mixers. This feature provides additional power gain
because of the impedance conversion and improved noise
performance when compared to traditional 50Ω interface
circuits. The LTC6410-6 drives a differential 50Ω load
directly with low distortion, which is suitable for driving
SAW filters and other 50Ω signal chain blocks.
The LTC6410-6 operates on 3V or 5V supplies. It comes in
a compact 16-lead 3mm
×
3mm QFN package and operates
over a –40°C to 85°C temperature range.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n
n
n
n
n
n
n
n
1.4GHz –3dB Bandwidth
Fixed Voltage Gain of 6dB (50Ω System)
Configurable Input Impedance Allows:
Simple Interface to Active Mixers
Improved Noise Performance
Wide 2.8V to 5.25V Supply Range
Low Distortion:
36dBm OIP3 (70MHz)
33dBm OIP3 (140MHz)
31dBm OIP3 (300MHz)
Low Noise:
11dB NF (50Ω Z
IN
)
8dB NF (200Ω Z
IN
)
Differential Inputs and Outputs
Self-Biasing Inputs/Outputs
Shutdown Mode
Minimal Support Circuitry Required
16-Lead 3mm
×
3mm
×
0.8mm QFN Package
APPLICATIONS
n
n
n
n
Post-Mixer Gain Block
SAW Filter Interface/Buffering
Differential IF Signal Chain Gain Block
Differential Line Driver/Receiver
TYPICAL APPLICATION
Post Mixer Gain Block (140MHz IF)
5V
5V
680pF
V
+
SHDN
–OUT
LTC6410-6
24nH
+IN
12pF
1760MHz
LO
LT5527
MIXER
18pF
+TERM
V
–
0.1μF
+OUT
V
BIAS
64106 TA01a
2-Tone Spectrum Analyzer Plot
0
–10
–20
0.1μF
OUTPUT POWER (dBm)
82nH
82nH
24nH
12pF
18pF
–TERM
–IN
–30
–40
–50
–60
–70
–80
–90
SYSTEM OIP3 = 29dBm AT 1900MHz
SYSTEM NF = 15dB AT 1900MHz
–100
130 132 134 136 138 140 142 144 146 148 150
FREQUENCY (MHz)
64106 TA01b
64106fa
1
LTC6410-6
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
+TERM
–TERM
12 V
–
17
11
SHDN
10 V
+
9 V
–
5
V
+
6
+OUT
7
–OUT
8
V
+
Total Supply Voltage (V
+
to V
–
) ................................5.5V
Amplifier Input Current (DC)
(+IN, –IN, +TERM, –TERM) .............................±10mA
Amplifier Input Power (AC)
(+IN, –IN, +TERM, –TERM) .............................18dBm
Input Current (V
BIAS
,
SHDN)
................................±10mA
Output Current (+OUT, –OUT) ..............................±50mA
Operating Temperature Range (Note 2).... –40°C to 85°C
Specified Temperature Range (Note 3) .... –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Junction Temperature .......................................... 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
TOP VIEW
+IN
–IN
16 15 14 13
V
–
V
+
1
V
BIAS
2
3
V
–
4
UD PACKAGE
16-LEAD (3mm
×
3mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 68°C/W,
θ
JC
= 4.2°C/W
EXPOSED PAD (PIN 17) IS V
–
, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC6410CUD-6#PBF
LTC6410IUD-6#PBF
TAPE AND REEL
LTC6410CUD-6#TRPBF
LTC6410IUD-6#TRPBF
PART MARKING*
LDBG
LDBG
PACKAGE DESCRIPTION
16-Lead (3mm
×
3mm) Plastic QFN
16-Lead (3mm
×
3mm) Plastic QFN
TEMPERATURE RANGE (Notes 2, 3)
–40°C to 85°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V,
SHDN
= 2V, +IN is shorted to +TERM, –IN is
shorted to –TERM, V
BIAS
= 1.5V, +IN = –IN = 1.5V, input source resistance (R
S
) is 25Ω on each input (50Ω differential), R
L
= 50Ω from
+OUT to –OUT, unless otherwise noted. V
BIAS
is defined as the voltage on the V
BIAS
pin. V
OUTCM
is defined as (+OUT + –OUT)/2. V
INCM
is defined as (+IN + –IN)/2. V
INDIFF
is defined as (+IN – –IN). V
OUTDIFF
is defined as (+OUT – –OUT). See DC test circuit schematic.
SYMBOL
G
DIFF
TC G
DIFF
V
SWINGDIFF
V
SWINGMIN
V
SWINGMAX
I
OUT
V
OS
PARAMETER
Differential Gain
(Low Frequency S21)
Differential Gain Temperature
Coefficient
Differential Output Voltage Swing
Output Swing Low
Output Swing High
Output Current Drive
Input Offset Voltage
l
3V DC ELECTRICAL CHARACTERISTICS
CONDITIONS
V
INDIFF
= ±0.2V
l
l
MIN
5.0
4.7
TYP
6.0
0.003
MAX
6.7
7.0
UNITS
dB
dB
dB/°C
V
P-P
V
P-P
V
OUTDIFF,
V
INDIFF
= ±2V
Single-Ended +OUT, –OUT, V
INDIFF
= ±2V
Single-Ended +OUT, –OUT, V
INDIFF
= ±2V
Short +OUT to –OUT, V
INDIFF
= ±2V (Note 4)
l
l
l
l
2.2
2.0
2.8
0.7
0.9
1.0
V
V
V
V
mA
mA
1.9
1.8
±38
±36
–2.0
–3.0
2.1
±42
0.4
2.0
3.0
mV
mV
64106fa
2
LTC6410-6
3V DC ELECTRICAL CHARACTERISTICS
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 3V, V
–
= 0V,
SHDN
= 2V, +IN is shorted to +TERM, –IN is
shorted to –TERM, V
BIAS
= 1.5V, +IN = –IN = 1.5V, input source resistance (R
S
) is 25Ω on each input (50Ω differential), R
L
= 50Ω from
+OUT to –OUT, unless otherwise noted. V
BIAS
is defined as the voltage on the V
BIAS
pin. V
OUTCM
is defined as (+OUT + –OUT)/2. V
INCM
is defined as (+IN + –IN)/2. V
INDIFF
is defined as (+IN – –IN). V
OUTDIFF
is defined as (+OUT – –OUT). See DC test circuit schematic.
SYMBOL
TC V
OS
V
OSINCM
A
V
I
VRMIN
I
VRMAX
R
INDIFF
X
INDIFF
R
INCM
CMRR
R
ODIFF
X
OUTDIFF
R
OUTCM
G
CM
V
OCMMIN
V
OCMMAX
V
OSCM
R
VOCM
C
VBIAS
SHDN
Pin
V
IL
V
IH
I
IL
I
IH
Power Supply
V
S
I
S
I
SSHDN
PSRR
Operating Range
Supply Current
l
l
PARAMETER
Input Offset Voltage Drift
Common Mode Offset Voltage
Internal Voltage Gain
Input Common Mode Voltage Range,
(Min)
Input Common Mode Voltage Range,
(Max)
Differential Input Resistance
Differential Input Reactance
Input Common Mode Resistance
Common Mode Rejection Ratio
Differential Output Resistance
Differential Output Reactance
Common Mode Output Resistance
Common Mode Gain
Output Common Mode Voltage
Adjustment Range, (Min)
Output Common Mode Voltage
Adjustment Range, (Max)
CONDITIONS
l
MIN
–40
–50
TYP
–0.3
13
2.7
MAX
40
50
1.0
UNITS
μV/°C
mV
mV
V/V
V
V
V
OUTCM
– V
INCM
l
l
l
2.0
40
30
58
1
1000
80
100
V
INDIFF
= ±100mV (Note 4)
f = 100MHz
V
BIAS
= 1.5V, +IN = –IN = 1V to 2V, (ΔV
OUTDIFF
/Gain)
V
OUTDIFF
= ±100mV (Note 4)
f = 100MHz
l
Ω
Ω
pF
Ω
dB
l
l
45
17
13
60
22
10
7
38
47
Ω
Ω
nH
Ω
Bias Voltage Control (V
BIAS
Pin)
V
BIAS
= 1.2V to 1.8V (+IN and –IN floating),
ΔV
OUTCM
/(0.6V)
l
l
l
0.7
0.6
0.86
1.0
1.0
1.0
1.2
V/V
V/V
V
V
1.8
–200
–400
2.4
2.0
2.0
100
3.0
3
300
400
3.6
4.0
Output Common Mode Offset Voltage V
OUTCM
– V
BIAS
V
BIAS
Input Resistance
V
BIAS
Input Capacitance
SHDN
Input Low Voltage
SHDN
Input High Voltage
SHDN
Input Low Current
SHDN
Input High Current
SHDN
= 0.8V
SHDN
= 2V
l
l
mV
mV
kΩ
kΩ
pF
V
l
l
l
l
0.8
–200
–150
2.8
1.0
1.8
–85
–30
2
0
0
5.25
104
130
140
5
V
μA
μA
V
mA
mA
mA
dB
Supply Current in Shutdown
Power Supply Rejection Ratio
SHDN
= 0.8V
V
+
= 2.8V to 5.25V, V
BIAS
= +IN = –IN = V
+
/2
l
l
3
73
100
64106fa
3
LTC6410-6
5V DC ELECTRICAL CHARACTERISTICS
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 5V, V
–
= 0V,
SHDN
= 3V, +IN is shorted to +TERM, –IN is
shorted to –TERM, V
INCM
= V
BIAS
= 2.5V, +IN = –IN = 2.5V, input source resistance (R
S
) is 25Ω on each input (50Ω differential), R
L
=
50Ω from +OUT to –OUT, unless otherwise noted. V
BIAS
is defined as the voltage on theV
BIAS
pin. V
OUTCM
is defined as (+OUT + –OUT)/2.
V
INCM
is defined as (+IN + –IN)/2. V
INDIFF
is defined as (+IN – –IN). V
OUTDIFF
is defined as (+OUT – –OUT). See DC test circuit schematic.
SYMBOL
G
DIFF
V
SWINGDIFF
V
SWINGMIN
V
SWINGMAX
I
S
SHDN
Pin
V
IL
V
IH
I
IL
I
IH
SHDN
Input Low Voltage
SHDN
Input High Voltage
SHDN
Input Low Current
SHDN
Input High Current
SHDN
= 1.8V
SHDN
= 3V
l
l
l
l
PARAMETER
Differential Gain (Low Frequency S21)
Differential Output Voltage Swing
Output Swing Low
Output Swing High
Supply Current
CONDITIONS
V
IN
= ±0.2V
V
OUTDIFF
, V
IN
= ±4V
Single-Ended +OUT, –OUT, V
IN
= ±4V
Single-Ended +OUT, –OUT, V
IN
= ±4V
l
l
l
l
l
MIN
5
4.7
4.1
3.5
TYP
6.1
4.8
1.1
MAX
6.7
7.0
UNITS
dB
dB
V
P-P
V
P-P
1.4
1.6
V
V
V
V
3.2
3.0
3.5
125
150
160
mA
mA
V
1.8
–300
–200
2.0
2.8
–110
–60
3
0
0
V
μA
μA
AC ELECTRICAL CHARACTERISTICS
+
The
l
denotes the specifications which apply over the full operating
–
SYMBOL
–3dBBW
0.1dBBW
0.5dBBW
SR
t
s
t
ON
t
OFF
PARAMETER
–3dB Bandwidth
Bandwidth for 0.1dB Flatness
Bandwidth for 0.5dB Flatness
Slew Rate
1% Settling Time
Turn-On Time
Turn-Off Time
1% Settling for a 1V
P-P
V
OUTDIFF
Step
SHDN
= 0V to 3V, +OUT and –OUT Within 10% of Final Values
SHDN
= 3V to 0V, +OUT and –OUT Within 10% of Final Values
0.2V
P-P
at V
BIAS
, Measured V
OUTCM
CONDITIONS
V
INDIFF
= –10dBm
V
INDIFF
= –10dBm
V
INDIFF
= –10dBm
MIN
1
TYP
1.4
150
300
1.5
3
30
30
1
100
MAX
temperature range, otherwise specifications are at T
A
= 25°C. V = 3V, V = 0V,
SHDN
= 2V, +IN is shorted to +TERM, –IN is shorted to
–TERM, V
INCM
= V
BIAS
= 1.5V, input source resistance (R
S
) is 25Ω on each input (50Ω differential), R
L
= 50Ω from +OUT to –OUT, +IN
and –IN are AC-coupled, unless otherwise noted. V
BIAS
is defined as the voltage on theV
BIAS
pin. V
OUTCM
is defined as
(+OUT + –OUT)/2. V
INCM
is defined as (+IN + –IN)/2. V
INDIFF
is defined as (+IN – –IN). V
OUTDIFF
is defined as (+OUT – –OUT).
UNITS
GHz
MHz
MHz
V/ns
ns
ns
ns
GHz
V/μs
Common Mode Voltage Control (V
BIAS
Pin)
–3dBBWCM Common Mode Small-Signal
–3dB Bandwidth
SRCM
10MHz Signal
HD2
HD3
Second Harmonic Distortion
Third Harmonic Distortion
V
OUTDIFF
= 0dBm
V
OUTDIFF
= 0dBm
–85
–71
dBc
dBc
Common Mode Slew Rate
Noise/Harmonic Performance Input/Output Characteristics
64106fa
4
LTC6410-6
AC ELECTRICAL CHARACTERISTICS
+
The
l
denotes the specifications which apply over the full operating
–
SYMBOL
IM3
PARAMETER
Third Order Intermodulated
Distortion
CONDITIONS
F1 = 9.5MHz, F2 = 10.5MHz, V
OUTDIFF
= 0dBm/Tone
F1 = 9.5MHz, F2 = 10.5MHz, V
OUTDIFF
= –5dBm/Tone
F1 = 9.5MHz, F2 = 10.5MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
OIP3
Output Third-Order Intercept
F1 = 9.5MHz, F2 = 10.5MHz, V
OUTDIFF
= 0dBm/Tone
F1 = 9.5MHz, F2 = 10.5MHz, V
OUTDIFF
= –5dBm/Tone
F1 = 9.5MHz, F2 = 10.5MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
P1dB
NF
70MHz Signal
HD2
HD3
IM3
Second Harmonic Distortion
Third Harmonic Distortion
Third Order Intermodulated
Distortion
V
OUTDIFF
= 0dBm
V
OUTDIFF
= 0dBm
F1 = 69.5MHz, F2 = 70.5MHz, V
OUTDIFF
= 0dBm/Tone
F1 = 69.5MHz, F2 = 70.5MHz, V
OUTDIFF
= –5dBm/Tone
F1 = 69.5MHz, F2 = 70.5MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
OIP3
Output Third-Order Intercept
F1 = 69.5MHz, F2 = 70.5MHz, V
OUTDIFF
= 0dBm/Tone
F1 = 69.5MHz, F2 = 70.5MHz, V
OUTDIFF
= –5dBm/Tone
F1 = 69.5MHz, F2 = 70.5MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
P1dB
NF
Output 1dB Compression Point
Noise Figure
Z
IN
= 50Ω (Note 5)
Z
IN
= 200Ω
V
OUTDIFF
= 0dBm
V
OUTDIFF
= 0dBm
F1 = 139.5MHz, F2 = 140.5MHz, V
OUTDIFF
= 0dBm/Tone
F1 = 139.5MHz, F2 = 140.5MHz, V
OUTDIFF
= –5dBm/Tone
F1 = 139.5MHz, F2 = 140.5MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
F1 = 130MHz, F2 = 150MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
OIP3
Output Third-Order Intercept
F1 = 139.5MHz, F2 = 140.5MHz, V
OUTDIFF
= 0dBm/Tone
F1 = 139.5MHz, F2 = 140.5MHz, V
OUTDIFF
= –5dBm/Tone
F1 = 139.5MHz, F2 = 140.5MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
F1 = 130MHz, F2 = 150MHz, V
OUTDIFF
= 0dBm/Tone,
V
CC
= 5V, V
BIAS
= 2.5V,
SHDN
= 3V
P1dB
Output 1dB Compression Point
28
–85
–69
–72
–79
–72
36
35
36
12.8
11
8
–80
–62
–62
–70
–66
–66
31
30
33
33
12.8
–56
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
dB
dB
dBc
dBc
dBc
dBc
dBc
dBc
dBm
dBm
dBm
dBm
dBm
64106fa
temperature range, otherwise specifications are at T
A
= 25°C. V = 3V, V = 0V,
SHDN
= 2V, +IN is shorted to +TERM, –IN is shorted to
–TERM, V
INCM
= V
BIAS
= 1.5V, input source resistance (R
S
) is 25Ω on each input (50Ω differential), R
L
= 50Ω from +OUT to –OUT, +IN
and –IN are AC-coupled, unless otherwise noted. V
BIAS
is defined as the voltage on theV
BIAS
pin. V
OUTCM
is defined as
(+OUT + –OUT)/2. V
INCM
is defined as (+IN + –IN)/2. V
INDIFF
is defined as (+IN – –IN). V
OUTDIFF
is defined as (+OUT – –OUT).
MIN
TYP
–72
–81
–66
36
36
33
12.8
Z
IN
= 50Ω (Note 5)
Z
IN
= 200Ω
11
8
MAX
UNITS
dBc
dBc
dBc
dBm
dBm
dBm
dBm
dB
dB
Output 1dB Compression Point
Noise Figure
140MHz Signal
HD2
HD3
IM3
Second Harmonic Distortion
Third Harmonic Distortion
Third Order Intermodulated
Distortion
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
