TB6551FG/FAG
TOSHIBA
Bi-CMOS Integrated Circuit Silicon Monolithic
TB6551FG, TB6551FAG
3-Phase Full-Wave Sine-Wave PWM Brushless Motor Controller
The TB6551FG/FAG is designed for motor fan applications
for three-phase brushless DC (BLDC) motors.
TB6551FG
Features
•
•
•
•
•
•
•
•
Sine-wave PWM control
Built-in triangular-wave generator
(Carrier cycle = f
OSC
/252 (Hz))
Built-in lead angle control function (0° to 58° in 32 steps)
Built-in dead time function (setting 2.6
μs
or 3.8
μs)
Bootstrap circuit compliant
Over-current protection signal input pin
Built-in regulator (V
ref
= 5 V (typ.), 30 mA (max))
Operating supply voltage range: V
CC
= 6 V to 10 V
TB6551FAG
P-SSOP24-0613-1.00-001
Weight:
SSOP24-P-300-1.00 : 0.33 g (typ.)
P-SSOP24-0613-1.00-001: 0.28 g (typ.)
1
2012-09-28
TB6551FG/FAG
Block Diagram
LA
23
X
in
14
X
out
15
HU 21
HV 20
HW 19
V
e
22
V
CC
1
P-GND 3
S-GND 13
V
refout
24
Power-on
reset
RES 11
I
dc
3
CW/CCW 18
FG 17
REV 16
ST/SP
Protection CW/CCW
&
ERR
reset
GB
FG
Rotating
direction
Comparator
PWM
HU
HV
HW
120°-
turn-on
matrix
Regulator
Internal
Phase
reference matching
voltage
Position detector
System clock
generator
5-bit AD
4 bits
Counter
Output
waveform
generator
Data
select
6-bit triangular
wave generator
Phase
U
Phase
V
Phase
W
Comparator
Comparator
Comparator
Switching
120°/180°
and
gate
block
protection
on/off
10 T
d
9 U
6 X
Setting
dead
time
8 V
5 Y
7 W
4 Z
120°/180°
Charger
12 OS
2
2012-09-28
TB6551FG/FAG
Pin Description
Pin No.
21
20
19
18
Symbol
HU
HV
HW
CW/CCW
Description
Positional signal
input pin U
Positional signal
input pin V
Positional signal
input pin W
Rotation direction
signal input pin
Remarks
When positional signal is HHH or LLL, gate block
protection operates.
With built-in pull-up resistor
L: Forward
H: Reverse
L: Reset (output is non-active)
Operation/Halt operation
Also used for gate block protection
11
RES
Reset-signal-input pin
22
23
12
V
e
LA
OS
Inputs voltage instruction
signal
Lead angle setting signal
input pin
Inputs output logic select
signal
Inputs over-current-
protection-signal
Inputs clock signal
Outputs clock signal
Outputs reference voltage
signal
FG signal output pin
Reverse rotation detection
signal
Outputs turn-on signal
Outputs turn-on signal
Outputs turn-on signal
Outputs turn-on signal
Outputs turn-on signal
Outputs turn-on signal
Power supply voltage pin
Inputs setting dead time
Ground for power supply
Ground for signals
With built-in pull-down resistor
Sets 0° to 58° in 32 steps
L: Active low
H: Active high
Inputs DC link current.
Reference voltage: 0.5 V
With built-in filter (
≈
1
μs)
With built-in feedback resistor
5 V (typ.), 30 mA (max)
Outputs 3PPR of positional signal
Detects reverse rotation.
3
I
dc
X
in
X
out
V
refout
FG
REV
U
V
W
X
Y
Z
V
CC
T
d
P-GND
S-GND
14
15
24
17
16
9
8
7
6
5
4
1
10
2
13
Select active high or active low using the output logic select pin.
V
CC
= 6 V to 10 V
L: 3.8
μs,
H or Open: 2.6
μs
Ground pin
Ground pin
3
2012-09-28
TB6551FG/FAG
Input/Output Equivalent Circuits
Pin Description
Symbol
Digital
Positional signal input pin U
Positional signal input pin V
Positional signal input pin W
HU
With Schmitt trigger
HV
HW
Hysteresis 300 mV (typ.)
L : 0.8 V (max)
H: V
refout
−
1 V (min)
Digital
Forward/reverse switching
input pin
CW/CCW
L: Forward (CW)
H: Reverse (CCW)
L : 0.8 V (max)
H: V
refout
−
1 V (min)
Digital
Reset input
L: Stops operation (reset).
H: Operates.
RES
With Schmitt trigger
Hysteresis 300 mV (typ.)
L : 0.8 V (max)
H: V
refout
−
1 V (min)
2.4 kΩ
120 kΩ
V
CC
120
Ω
240 kΩ
V
CC
120
Ω
240 kΩ
V
refout
V
refout
V
refout
Hysteresis 300 mV (typ.)
120 kΩ
2.4 kΩ
With Schmitt trigger
V
refout
V
refout
240 kΩ
2.4 kΩ
Input/Output Signal
Input/Output Internal Circuit
Voltage instruction signal
input pin
Turn on the lower transistor
at 0.2 V or less.
(X, Y, Z pins: On duty of 8%)
V
e
Analog
Input range 0 V to 5.0 V
Input voltage of Vrefout or higher is
clipped to Vrefout.
Lead angle setting signal
input pin
0 V: 0°
5 V: 58°
(5-bit AD)
LA
Analog
Input range 0 V to 5.0 V
Input voltage of V
refout
or higher is
clipped to V
refout
.
4
2012-09-28
TB6551FG/FAG
Pin Description
Symbol
Input/Output Signal
Input/Output Internal Circuit
V
refout
V
refout
Setting dead time input pin
L : 3.8
μs
H or Open: 2.6
μs
T
d
120 kΩ
1.2 kΩ
V
refout
V
refout
120 kΩ
2.4 kΩ
V
CC
Analog
Over-current protection
signal input pin
I
dc
Gate block protected at 0.5 V or higher
(released at carrier cycle)
240 kΩ
5 pF
0.5 V
V
refout
Comparator
V
refout
Operating range
2 MHz to 8 MHz (ceramic oscillation)
Clock signal output pin
X
out
X
in
X
out
360 kΩ
Digital
OS
L: Active low
H: Active high
L : 0.8 V (max)
H: V
refout
−
1 V (min)
V
CC
V
CC
V
CC
Digital
L : 0.8 V (max)
H: V
refout
−
1 V (min)
Output logic select signal
input pin
Clock signal input pin
X
in
Reference voltage signal
output pin
Vrefout
5 ± 0.5 V (max 30 mA)
5
2012-09-28
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