Complete Current Share 10A DC/DC Power Module
ISL8200MM
The ISL8200MMREP is a simple and easy to use high power,
current-sharing DC/DC power module for
Datacom/Telecom/FPGA power hungry applications. All that is
needed is the ISL8200MMREP, a few passive components and
one V
OUT
setting resistor to have a complete 10A design ready
for market.
The ease of use virtually eliminates the design and
manufacturing risks while dramatically improving time to
market.
Need more output current? Just simply parallel up to six
ISL8200MMREP modules to scale up to a 60A solution (see
Figure 6 on page 10).
The simplicity of the ISL8200MMREP is in its “Off The Shelf”,
unassisted implementation. Patented current sharing in multi-
phase operation greatly reduces ripple currents, BOM cost and
complexity. For example, parallel 2 for 20A and up to 6 for 60A.
The output voltage can be precisely regulated to as low as 0.6V
with ±1% output voltage regulation over line, load, and
temperature variations.
The ISL8200MMREP’s thermally enhanced, compact QFN
package, operates at full load and over-temperature, without
requiring forced air cooling. It's so thin it can even fit on the back
side of the PCB. Easy access to all pins with few external
components, reduces the PCB design to a component layer and a
simple ground layer.
Features
• Specifications per DLA VID
V62/10608
• Full mil-temp electrical performance from -55°C to +125°C
• Full traceability through assembly and test by date/trace code
assignment
• Enhanced process change notification
• Enhanced obsolescence management
• Complete switch mode power supply in one package
• Patented current share architecture reduces layout sensitivity
when modules are paralleled
• Programmable phase shift (1, 2, 3, 4, and 6 phase)
• Extremely low profile (2.2mm height)
• Input voltage range +3.0V to +20V at 10A, current share up to
60A
• A Single resistor sets V
OUT
from +0.6V to +6V
• Output overvoltage, overcurrent and over-temperature, built-in
protection and undervoltage indication
Applications
• Servers, telecom and datacom applications
• Industrial and medical equipment
• Point of load regulation
Related Literature
• iSim Model - (See Product Information page
ISL8200MM)
Complete Functional Schematic
V
IN
RANGE
4.5V TO 20V
R
1
22 F
ISL8200MMREP Package
PV
IN
ISL8200MMREP
Power Module
V
OUT_SET
V
SEN_REM
-
P
GND
P
Vcc
P
GND1
10 F
5k
R
SET
330 F
V
IN
V
OUT
V
OUT
RANGE
0.6V TO 6.0V
2.2mm
V
EN
R
2
EN
FF
I
Set
I
SHARE
15
m
m
mm
15
FIGURE 1. COMPLETE 10A DESIGN, JUST SELECT R
SET
FOR THE
DESIRED V
OUT
FIGURE 2. THE 2.2mm HEIGHT IS IDEAL FOR THE BACKSIDE OF
PCBS WHEN SPACE AND HEIGHT IS A PREMIUM
March 15, 2013
FN7690.2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Copyright Intersil Americas LLC 2010, 2011, 2013. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
ISL8200MM
Ordering Information
PART NUMBER
(Notes 1, 2)
ISL8200MMREP
VENDOR ITEM DRAWING
V62/10608-01XB
PART MARKING
8200MMREP
TEMP. RANGE (°C)
-55 to +125
PACKAGE
23 Ld QFN
PKG. DWG. #
L23.15x15
NOTE:
1. Add “-T” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. For Moisture Sensitivity Level (MSL), please see device information page for
ISL8200MM.
For more information on MSL please see techbrief
TB363.
Pinout Internal Circuit
V
CC
21
PV
CC
14
PV
IN
17
C
F1
R
CC
C
F2
BOOT
1
V
IN
13
UGATE
1
EN
12
PHASE
1
FF
11
V
CC
R
PG
PGOOD
22
V
CC
R
CLK
CLK
OUT
8
V
CC
R
PHC
PH_CNTRL
9
CONTROLLER
R
SEN
16
ISEN
1B
I
SET
5
C
F3
I
SHARE
6
C
F4
I
SHARE
_
BUS
10
V
MON1
I
SFETDRV
3
V
SEN1+
F
SYNC
_
IN
7
R
FS
V
SEN1-
R
CSR
1
C
VSEN
R
OS1
2
V
SEN
_
REM-
V
OUT
_
SET
Z
COMP2
FB
1
COMP
Z
COMP1
20
OC
SET
PHASE
ISEN
1A
18
PGND
LGATE
1
Q
2
L
OUT1
19
V
OUT
Q
1
C
BOOT1
15
PGND
1
4
PGND
1
2
FN7690.2
March 15, 2013
ISL8200MM
Pin Configuration
ISL8200MMREP
(23 LD QFN)
TOP VIEW
(10) ISHARE_BUS
(2) VSEN_REM-
(3) ISEFETDRV
(9) PH_CNTRL
(1) VOUT_SET
(7) FSYNC_IN
(8) CLKOUT
(6) ISHARE
(4) PGND1
(5) ISET
(11) FF
EN (12)
VIN (13)
PVCC (14)
(23) NC
(22) PGOOD
(21) VCC
(20) OCSET
PGND1 (15)
PHASE (16)
PD1
PVIN (17)
PD2
PD3
(18) PGND
PD4
(19) VOUT
Pin Descriptions
PIN
NUMBER
1
2
PIN
NAME
VOUT_SET
VSEN_REM-
PIN DESCRIPTION
Analog Voltage Input - Used with V
OUT
to program the regulator output voltage. The typical input impedance of VSEN1+
with respect to VSEN1- is 600kΩ. The typical input voltage is 0.6V.
Analog Voltage Input - This pin is the negative input of standard unity gain operational amplifier for differential remote
sense for the regulator, and should connect to the negative rail of the load/processor. This pin can be used for V
OUT
trimming by connecting a resistor from this pin to the VOUT_SET pin.
Digital Output - This pin is used to drive an optional NFET, which will connect ISHARE with the system ISHARE bus upon
completing a pre-bias start-up. The output voltage range is 0V to 5V.
Normal Ground - All voltage levels are referenced to this pad. This pad provides a return path for the low-side MOSFET
drives and internal power circuitries as well as all analog signals. PGND and PGND1 should be connected together with a
ground plane.
Analog Current Output - This pin sources a 15µA offset current plus Channel 1’s average current. The voltage (VISET) set
by an external resistor (RISET) represents the average current level of the local active module. For full-scale current, RISET
should be ~10kΩ. The output current range is 15µA to 108µA typical.
3
4, 15
ISFETDRV
PGND1
5
ISET
3
FN7690.2
March 15, 2013
ISL8200MM
Pin Descriptions
(Continued)
PIN
NUMBER
6
PIN
NAME
ISHARE
PIN DESCRIPTION
Analog Current Output - Cascaded system level overcurrent shutdown pin. This pin is used where you have multiple
modules configured for current sharing and is used with a common current share bus. The bus sums each of the modules'
average current contribution to the load to protect for an overcurrent condition at the load. The pin sources 15µA plus
average module's output current. The shared bus voltage (VISHARE) is developed across an external resistor (RISHARE).
VISHARE represents the average current of all active channel(s) that are connected together.
The ISHARE bus voltage is compared with each module's internal reference voltage set by each module's RISET resistor.
This will generate and individual current share error signal in each cascaded controller. The share bus impedance
RISHARE should be set as RISET/NCTRL, RISET divided by the number of active current sharing controllers. The output
current from this pin generates a voltage across the external resistor. This voltage, VISHARE, is compared to an internal
1.2V threshold for average overcurrent protection. For full-scale current, RISHARE should be ~10kΩ. Typically 10kΩ is used
for RSHARE and RSET. The output current range is 15µA to 108µA typical.
Analog input Control Pin - An optional external resistor (RFS-ext) connected to this pin and ground will increase the
oscillator switching frequency. It has an internal 59kΩ resistor for a default frequency of 700kHz. The internal oscillator
will lock to an external frequency source when connected to a square wave form. The external source is typically the
CLKOUT signal from another ISL8200MMREP or an external clock. The internal oscillator synchronizes with the leading
positive edge of the input signal. The input voltage range from external source is a 0V to 5V Square Wave.
Digital Voltage Output - This pin provides a clock signal to synchronize with other ISL8200MMREP(s). When there is more
than one ISL8200MMREP in the system, the two independent regulators can be programmed via PH_CNTRL for different
degrees of phase delay.
Analog Input - The voltage level on this pin is used to program the phase shift of the CLKOUT clock signal to synchronize
with other module(s).
Open pin until first PWM pulse is generated. Then, via an internal FET, this pin connects the module’s ISHARE to the
system’s ISHARE bus after pre-bias is complete and soft-start is initiated.
Analog Voltage Input - The voltage on this pin is fed into the controller, adjusting the sawtooth amplitude to generate the
feed-forward function. The voltage input range is 0.8V to V
CC
.
This is a double function pin: Analog Input Voltage - The input voltage to this pin is compared with a precision 0.8V
reference and enables the digital soft-start. The input voltage range is 0V to V
CC
or V
IN
through a pull up resistor
maintaining a typical current of 5mA.
Analog Voltage Output - This pin can be used as a voltage monitor for input bus undervoltage lockout. The hysteresis levels
of the lockout can be programmed via this pin using a resistor divider network. Furthermore, during fault conditions (such
as overvoltage, overcurrent, and over-temperature), this pin is used to communicate the information to other cascaded
modules by pulling low the wired OR as it is an Open Drain. The output voltage range is 0V to V
CC
.
Analog Voltage Input - This pin should be tied directly to the input rail when using the internal linear regulator. It provides
power to the internal linear drive circuitry. When used with a supply 5V or below, this pin should be tied directly to PVCC.
The internal linear device is protected against the reversed bias generated by the remaining charge of the decoupling
capacitor at VCC when losing the input rail. The input voltage range is 4.5V to 20V.
Analog Output - This pin is the output of the internal series linear regulator. It provides the bias for both low-side and
high-side drives. Its operational voltage range is 4.5V to 5.6V. The decoupling ceramic capacitor in the PVCC pin is 10µF.
Analog Output = This pin is the phase node of the regulator. The output voltage range is 0V to 30V.
Analog Input - This input voltage is applied to the power FETS with the FET’s ground being the PGND pin. It is recommended
to place input decoupling capacitance, 22µF, directly between the PVIN pin and PGND pin as close as possible to the
module. The input voltage range is 0V to 20V.
All voltage levels are referenced to this pad. This is the low side MOSFET ground. PGND and PGND1 should be connected
together with a ground plane.
Output voltage from the module. The output voltage range is 0.6V to 6V.
Analog Input - This pin is used with the PHASE pin to set the current limit of the module. The input voltage range is 0V to
30V.
Analog Input - This pin provides bias power for the analog circuitry. Its operational range is 4.5V to 5.6V. In 3.3V
applications, VCC, PVCC and VIN should be shorted to allow operation at the low end input as it relates to the V
CC
falling
threshold limit. This pin can be powered either by the internal linear regulator or by an external voltage source.
Analog Output - This pin, pulled up to VCC via a 10kΩ resistor, provides a Power-Good signal when the output is within 9%
of nominal output regulation point with 4% hysteresis (13%/9%), and soft-start is complete. PGOOD monitors the outputs
(VMON1) of the internal differential amplifiers. The output voltage range is 0V to V
CC
.
7
FSYNC_IN
8
CLKOUT
9
10
11
12
PH_CNTRL
ISHARE_BUS
FF
EN
13
VIN
14
16
17
PVCC
PHASE
PVIN
18
19
20
21
PGND
VOUT
OCSET
VCC
22
PGOOD
4
FN7690.2
March 15, 2013
ISL8200MM
Pin Descriptions
(Continued)
PIN
NUMBER
23
PD1
PIN
NAME
NC
Not internally connected.
PIN DESCRIPTION
Phase Thermal Pad Used for both the PHASE pin (Pin # 16) and for heat removal connecting to heat dissipation layers using Vias. Connect this
pad to a copper island on the PCB board with the same shape as the PHASE thermal pad. Potential should be floating and
not electrically connected to anything except PHASE pin.
V
IN
Thermal Pad
Used for both the PVIN pin (Pin # 17) and for heat removal connecting to heat dissipation layers using Vias. Connect this
pad to a copper island on the PCB board with the same shape as the V
IN
thermal pad. Potential should be floating and
not electrically connected to anything except VPVIN pin.
PD2
PD3
PGND Thermal Pad Used for both the PGND pin (Pin # 18) and for heat removal connecting to heat dissipation layers using Vias. Connect this
pad to a copper island on the PCB board with the same shape as the PGND thermal pad. Potential should be floating and
not electrically connected to anything except PGND pin.
V
OUT
Thermal Pad Used for both the VOUT pin (Pin # 19) and for heat removal connecting to heat dissipation layers using Vias. Connect this
pad to a copper island on the PCB board with the same shape as the V
OUT
thermal pad. Potential should be floating and
not electrically connected to anything except VOUT pin.
PD4
Typical Application Circuits
VIN
R1
16.5k
CIN(CER)
ISL8200MMREP
ISL8200MMREP
ISL8200M
PVIN
VIN
FF
R2
4.12k
CEN
1nF
EN
F SY NC_IN
CLKOUT
ISHARE_BUS
ISFETDRV1
ISFETDRV
ISHARE
OCSET
PHASE
PGOOD
PH_CNTRL
VCC
PGND1
PGND
PVCC
ISET
PGOOD1
VOUT_SET
VSEN_REM-
VOUT
2.2k
RSET
U201
VOUT
GND
COUT
GND
* Select R1 & R2
such that
0.8V<V
EN
<5.0V
(See Table 1,
V
OUT
- R
SET
on page 13)
CPVCC
10uF
RISHARE
5k
FIGURE 3. SINGLE PHASE 10A 1.2V OUTPUT CIRCUIT
5
FN7690.2
March 15, 2013
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