provides power for large TFT-LCD panels. The 38-pin
5mm
×
7mm QFN device can generate a 3.3V or 5V logic
supply along with the triple output supply required for the
TFT-LCD panel. A lower voltage secondary logic supply
may also be generated with the addition of an external
NPN driven by the internal linear regulator. A step-down
regulator provides a low voltage output, V
LOGIC
, with up
to 1.2A of current while capable of operating from a wide
input range of 4.5V to 30V. A high power step-up con-
verter, a lower power step-up converter and an inverting
converter provide the three independent output voltages:
AV
DD
, V
ON
and V
OFF
required by the LCD panel. A high-side
PNP provides delayed turn-on of the V
ON
signal and can
handle up to 30mA. Protection circuitry ensures that V
ON
is disabled if any of the four outputs are more than 10%
below the programmed voltage.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
PanelProtect is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
n
n
n
n
n
n
n
n
n
4.5V to 30V Input Voltage Range
Four Integrated Switches: 2.2A Buck, 1.5A Boost,
0.25A Boost, 0.25A Inverter (Guaranteed Minimum
Current Limit)
External NPN LDO Driver
Fixed Frequency, Low Noise Outputs
Inductor Current Sense for Buck
Soft-Start for All Outputs
Externally Programmable V
ON
Delay
Three Integrated Schottky Diodes
PGOOD
Pin for AV
DD
Output Disconnect
PanelProtect
TM
Circuitry Disables V
ON
Upon Fault
Thermally Enhanced 38-Lead 5mm
×
7mm QFN
Package
APPLICATIONS
n
n
n
Automotive TFT-LCD Displays
Large TFT-LCD Desktop Monitors
Flat Panel Televisions
TYPICAL APPLICATION
V
IN
8V TO 16V
V
OFF
–10V
20mA
2.2μF
69.8k
0.47μF
60.4k
10μH
UVLO LDOPWR V
IN
SW4
D4
NFB4
10k
4.7μH
V
LOGIC
5V
0.5A
0.22μF
SW1
SENSE
+
SENSE
–
FB1
LT3513
V
ON_CLK
V
ON
V
ONSINK
E3
6.8μH
V
LDO
3.3V
0.5A
10μF
10k
BD
FB5
42.2k
V
C1
7.5k
2.7nF
V
C2
4.7k
GND
V
C3
30k
SW3
FB3
V
C4
13k
2.2nF
165k
V
LOGIC
5V
10k
2.2μF
V
ON_CLK
232k
V
ON
22V
20mA
BIAS
BOOST
SW2
FB2
PGOOD
RUN-SS1
RUN-SS2
RUN-SS3/4
C
T
47nF
15nF
15nF
15nF
RUN/SS 2V/DIV
V
LOGIC
5V/DIV
AV
DD
10V/DIV
V
OFF
10V/DIV
10k
10μF
AV
DD
8V
80mA
10μF 178k
V
LOGIC
5V
10μH
53.6k
100k
Start-Up Waveforms
30.1k
22μF
10k
V
E3
20V/DIV
V
ON
20V/DIV
I
IN(AVG)
1A/DIV
0.47μF
5ms/DIV
3513 TA01b
4.7nF 1.5nF
3513fa
1
LT3513
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
UVLO
SW1
SW1
GND
FB1
31 SENSE
+
30 SENSE
–
29 BIAS
28 BOOST
27 LDOPWR
39
26 BD
25 SW4
24 D4
23 NFB4
22 RUN-SS1
21 V
C4
20 V
C2
13 14 15 16 17 18 19
C
T
SW2
SW2
BIAS
GND
GND
FB2
V
IN
V
IN
V
IN
, LDOPWR Voltage ...............................................32V
UVLO Voltage ............................................................32V
SW2, SW3, SW4 Voltage ..........................................40V
E3 Pin Voltage ...........................................................40V
V
ON
, V
ONSINK
Voltage ................................................40V
PGOOD
Voltage .........................................................40V
D4 Voltage ........................................................ 1V, –40V
BOOST Voltage .........................................................37V
BOOST Over SW1 .......................................................8V
SENSE
+
, SENSE
–
Voltage ..........................................10V
V
ON_CLK
Voltage ........................................................10V
BIAS, BD Voltage ......................................................10V
C
T
Pin Voltage .............................................................5V
RUN-SS1, RUN-SS2, RUN-SS3/4 Voltage ..................5V
FB1, FB2, FB3, FB5 Voltage .........................................5V
NFB4 Voltage ...................................................... 5V, –5V
V
C1
, V
C2
, V
C3
, V
C4
Voltage ..........................................5V
Junction Temperature ........................................... 125°C
Operating Temperature Range (Note 2).. –40°C to 125°C
Storage Temperature Range................... –65°C to 125°C
38 37 36 35 34 33 32
FB5 1
V
C1
2
RUN-SS3/4 3
FB3 4
RUN-SS2 5
SW3 6
E3 7
V
ON
8
V
ONSINK
9
V
ON_CLK
10
PGOOD
11
V
C3
12
UHF PACKAGE
38-LEAD (5mm 7mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 34°C/W,
θ
JC
= 1°C/W
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LT3513EUHF#PBF
LT3513IUHF#PBF
TAPE AND REEL
LT3513EUHF#TRPBF
LT3513IUHF#TRPBF
PART MARKING*
3513
3513
PACKAGE DESCRIPTION
38-Lead (5mm
×
7mm) Plastic QFN
38-Lead (5mm
×
7mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 12V, BIAS = 3V, unless otherwise noted.
PARAMETER
Minimum Input Voltage
Quiescent Current
RUN-SS1, RUN-SS2, RUN-SS3/4 Pin Current
RUN-SS1, RUN-SS2, RUN-SS3/4 Threshold
BIAS Pin Voltage to Begin RUN-SS2, RUN-SS3/4
BIAS Pin Current
BIAS = 3.1V, All Switches Off
l
ELECTRICAL CHARACTERISTICS
CONDITIONS
MIN
l
TYP
7.5
30
2
0.8
2.25
16.5
MAX
4.5
12
65
UNITS
V
mA
μA
μA
V
Not Switching
V
RUNSS1
= 0V
RUN-SS1= RUN-SS2 = RUN-SS3
= RUN-SS4 = 0.4V
2.7
20
V
mA
3513fa
2
LT3513
ELECTRICAL CHARACTERISTICS
PARAMETER
FB Threshold Offset to Begin C
T
Charge
C
T
Pin Current Source
C
T
Threshold to Power V
ON
V
ON
Switch Drop
Maximum V
ON
Current
V
ON_CLK
Input Voltage High
V
ON_CLK
Input Voltage Low
V
ONSINK
Voltage On
Master Oscillator Frequency
●
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 12V, BIAS = 3V, unless otherwise noted.
CONDITIONS
(Note 3)
All FB Pins = 1.5V
All FB Pins = 1.5V
V
ON
Current = 30mA
V
E3
= 30V
l
MIN
90
16
1
30
1.5
TYP
125
20
1.1
200
50
MAX
160
25
1.2
400
UNITS
mV
μA
V
mV
mA
V
0.3
V
ONSINK
Current = 1μA
●
V
V
MHz
MHz
kHz
V
1.2
1.90
1.80
2
200
1.25
3.4
90
4
1
1.215
1.205
1.235
0.01
1.255
1.265
0.03
200
3.9
125
4.4
160
2.12
2.22
Foldback Switching Frequency
UVLO Pin Threshold
UVLO Pin Hysteresis Current
PGOOD
Threshold Offset
PGOOD
Sink Current
PGOOD
Pin Leakage
Switch 1 (2.2A Buck)
FB1 Voltage
All FB = 0V
UVLO Pin Voltage Rising
V
UVLO
= 1V
PGOOD
Connected to 40V Through 100k
V
PGOOD
= 40V
μA
mV
mA
μA
V
V
%/V
nA
V/V
μmhos
%
●
FB1 Voltage Line Regulation
FB1 Pin Bias Current
Error Amplifier 1 Voltage Gain
Error Amplifier 1 Transconductance
Maximum Duty Cycle
Switch 1 Current Limit
Switch 1 V
CESAT
Switch 1 Leakage Current
Minimum BOOST Voltage Above SW1 Pin
BOOST Pin Current
BOOST Schottky Diode Drop
Switch 2 (1.5A BOOST)
FB2 Voltage
4.5V < V
IN
< 32V
(Note 4)
ΔI
= 10μA
●
●
30
250
220
75
2.2
85
3
430
0.1
1.8
30
700
1.20
1.19
1.22
0.01
Duty Cycle = 35% (Note 5)
I
SW
= 1.5A
FB1 = 1.5V
I
SW
= 1.5A (Note 6)
I
SW
= 1.5A
I = 170mA
3.5
10
2.5
50
A
mV
μA
V
mA
mV
●
1.24
1.25
0.03
200
V
V
%/V
nA
V/V
μmhos
FB2 Voltage Line Regulation
FB2 Pin Bias Current
Error Amplifier 2 Voltage Gain
Error Amplifier 2 Transconductance
Switch 2 Current Limit
Switch 2 V
CESAT
Switch 2 Leakage Current
BIAS Pin Current Due to SW2
Maximum Duty Cycle (SW2)
4.5V < V
IN
< 32V
(Note 4)
ΔI
= 10μA
1.5
I
SW2
= 1.2A
FB2 = 1.5V
I
SW2
= 1.2A
●
●
30
250
220
1.85
360
0.1
45
75
90
2.3
1
A
mV
μA
mA
%
3513fa
3
LT3513
ELECTRICAL CHARACTERISTICS
PARAMETER
Switch 3 (250mA BOOST)
FB3 Voltage
●
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 12V, BIAS = 3V, unless otherwise noted.
CONDITIONS
MIN
1.20
1.19
TYP
1.22
0.01
●
MAX
1.24
1.25
0.03
200
UNITS
V
V
%/V
nA
V/V
μmhos
FB3 Voltage Line Regulation
FB3 Pin Bias Current
Error Amplifier 3 Voltage Gain
Error Amplifier 3 Transconductance
Switch 3 Current Limit
Switch 3 V
CESAT
Switch 3 Leakage Current
BIAS Pin Current Due to SW3
Maximum Duty Cycle (SW3)
Schottky Diode Drop
Switch 4 (250mA Inverter)
NFB4 Voltage
4.5V < V
IN
< 32V
(Note 4)
ΔI
= 10μA
0.25
I
SW3
= 0.2A
FB3 = 1.5V
I
SW3
= 0.2A
●
30
250
220
0.3
200
0.1
18
84
88
900
–1.205
–1.215
–1.180
0.01
0.38
1
A
mV
μA
mA
%
mV
I = 170mA
●
–1.155
–1.145
0.03
16
V
V
%/V
μA
V/V
μmhos
NFB4 Voltage Line Regulation
NFB4 Pin Bias Current
Error Amplifier 4 Voltage Gain
Error Amplifier 4 Transconductance
Switch 4 Current Limit
Switch 4 V
CESAT
Switch 4 Leakage Current
BIAS Pin Current Due to SW4
Maximum Duty Cycle (SW4)
Schottky Diode Drop (D4)
NPN LDO
FB5 Voltage
4.5V < V
IN
< 32V
(Note 4)
ΔI
= 10μA
0.28
I
SW4
= 0.2A
NFB4 = –1.5V
I
SW4
= 0.2A
84
I = 170mA
0.61
0.6
6
4.5
●
5
200
220
0.3
200
0.1
18
88
700
0.625
8
0.40
1
A
mV
μA
mA
%
mV
●
0.63
0.65
10
V
V
mA
V
Base Drive Current
LDOPWR Minimum Voltage
FB5 = 0.5V
BD = 3.5V
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LT3513E is guaranteed to meet specified performance from
0°C to 125°C junction temperature. Specifications over the –40°C to
125°C operating junction temperature range are assured by design,
characterization and correlation with statistical process controls. The
LT3513I is guarenteed over the full –40°C to 125°C operating junction
temperature range.
Note 3:
The C
T
pin is held low until FB1, FB2, FB3 and NFB4 all ramp
above the FB threshold offset.
Note 4:
Current flows out of FB1, FB2, FB3 and NFB4.
Note 5:
Current limit is guaranteed by design and/or correlation to static
test. Slope compensation reduces current limit at higher duty cycles.
Note 6:
This is the minimum voltage across the boost capacitor needed to
guarantee full saturation of the internal power switch.
Note 7:
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed the maximum operating junction temperature
range when overtemperature protection is active. Continuous operation
above the specified maximum operating junction temperature may impair
NXP MCU
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