RJK0351DSP
Silicon N Channel Power MOS FET
Power Switching
REJ03G1721-0200
Rev.2.00
Jul 10, 2008
Features
Capable of 4.5 V gate drive
Low drive current
High density mounting
Low on-resistance
R
DS(on)
= 4.0 m
Ω
typ. (at V
GS
= 10 V)
•
Pb-free
•
•
•
•
Outline
RENESAS Package code: PRSP0008DD-D
(Package name: SOP-8<FP-8DAV>)
87
65
5 6 7 8
D D D D
1, 2, 3
Source
4
Gate
5, 6, 7, 8 Drain
3
12
4
4
G
S S S
1 2 3
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel to ambient thermal impedance
Channel temperature
Storage temperature
Symbol
V
DSS
V
GSS
I
D
I
D(pulse)
I
DR
I
AP Note 2
Note1
Ratings
30
±20
20
160
20
17
28.9
2.5
50
150
–55 to +150
Unit
V
V
A
A
A
A
mJ
W
°C/W
°C
°C
E
AR Note 2
Pch
Note3
θch-a
Note3
Tch
Tstg
Notes: 1. PW
≤
10
µs,
duty cycle
≤
1%
2. Value at Tch = 25°C, Rg
≥
50
Ω
3. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW
≤
10s
REJ03G1721-0200 Rev.2.00 Jul 10, 2008
Page 1 of 6
RJK0351DSP
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body–drain diode forward voltage
Body–drain diode reverse recovery
time
Notes: 4. Pulse test
Symbol
V
(BR)DSS
I
GSS
I
DSS
V
GS(off)
R
DS(on)
R
DS(on)
|y
fs
|
Ciss
Coss
Crss
Qg
Qgs
Qgd
t
d(on)
t
r
t
d(off)
t
f
V
DF
t
rr
Min
30
—
—
1.2
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
4.0
5.0
51
2560
470
180
17
6.3
3.7
8.6
4.6
52
6.6
0.77
25
Max
—
± 0.1
1
2.5
5.2
6.9
—
—
—
—
—
—
—
—
—
—
—
1.01
—
Unit
V
µA
µA
V
mΩ
mΩ
S
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
ns
Test Conditions
I
D
= 10 mA, V
GS
= 0
V
GS
= ±20 V, V
DS
= 0
V
DS
= 30 V, V
GS
= 0
V
DS
= 10 V, I
D
= 1 mA
I
D
= 10 A, V
GS
= 10 V
Note4
I
D
= 10 A, V
GS
= 4.5 V
Note4
I
D
= 10 A, V
DS
= 10 V
Note4
V
DS
= 10 V
V
GS
= 0
f = 1 MHz
V
DD
= 10 V
V
GS
= 4.5 V
I
D
= 20 A
V
GS
= 10 V, I
D
= 10 A
V
DD
≅
10 V
R
L
= 1.0
Ω
Rg = 4.7
Ω
I
F
= 20 A, V
GS
= 0
Note4
I
F
= 20 A, V
GS
= 0
di
F
/ dt = 100 A/
µs
REJ03G1721-0200 Rev.2.00 Jul 10, 2008
Page 2 of 6
RJK0351DSP
Main Characteristics
Power vs. Temperature Derating
4.0
Maximum Safe Operation Area
500
Channel Dissipation Pch (W)
I
D
(A)
3.0
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW
≤
10 s
10 µs
100
PW
1m
10
Drain Current
10
DC
=1
s
0
µs
2.0
Op
era
t
0m
s
W
N
< 1
ote
0s
5
)
ion
1
Operation in
this area is
limited by R
DS(on)
(P
1.0
0.1
0.01
0.1 0.3
1
3
10 30 100
Drain to Source Voltage V
DS
(V)
Note 5 :
When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Transfer Characteristics
50
4.5 V
10 V
Pulse Test
3.0 V
3.2 V
V
DS
= 10 V
Pulse Test
Ta = 25 °C
1 shot Pulse
0
50
100
150
200
Ambient Temperature Ta (°C)
Typical Output Characteristics
50
I
D
(A)
30
I
D
(A)
Drain Current
40
40
30
Drain Current
20
V
GS
= 2.6 V
20
25°C
–25°C
10
10
Tc = 75°C
0
2
4
6
8
10
0
1
2
3
4
5
Drain to Source Voltage
V
DS
(V)
Gate to Source Voltage
V
GS
(V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
200
Static Drain to Source on State Resistance
vs. Drain Current
Drain to Source on State Resistance
R
DS (on)
(mΩ)
Drain to Source Saturation Voltage
V
DS (on)
(mV)
100
Pulse Test
Pulse Test
150
30
100
10
V
GS
= 4.5 V
3
10 V
I
D
= 20 A
50
10 A
5A
0
4
8
12
16
20
1
1
3
10
30
100
300 1000
Gate to Source Voltage
V
GS
(V)
Drain Current
I
D
(A)
REJ03G1721-0200 Rev.2.00 Jul 10, 2008
Page 3 of 6
RJK0351DSP
Static Drain to Source on State Resistance
vs. Temperature
10
Pulse Test
10000
3000
Static Drain to Source on State Resistance
R
DS (on)
(mΩ)
Typical Capacitance vs.
Drain to Source Voltage
Capacitance C (pF)
8
I
D
= 5 A, 10 A, 20 A
Ciss
1000
300
100
30
10
0
V
GS
= 0
f = 1 MHz
10
20
30
6
V
GS
= 4.5 V
Coss
Crss
4
10 V
2
0
–25
5 A, 10 A, 20 A
0
25
50
75
100 125 150
Case Temperature
Tc
(
°
C)
Drain to Source Voltage V
DS
(V)
Reverse Drain Current vs.
Source to Drain Voltage
V
GS
(V)
20
50
Dynamic Input Characteristics
V
DS
(V)
50
Reverse Drain Current I
DR
(A)
I
D
= 20 A
V
GS
16
V
DD
= 25 V
10 V
Pulse Test
10 V
40
5V
40
Drain to Source Voltage
30
V
DS
20
12
Gate to Source Voltage
30
8
20
V
GS
= 0, –5 V
10
V
DD
= 25 V
10 V
0
20
40
60
80
4
10
0
0
100
0
0.4
0.8
1.2
1.6
2.0
Gate Charge
Qg (nc)
Source to Drain Voltage V
SD
(V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
Repetitive Avalanche Energy E
AR
(mJ)
50
I
AP
= 17 A
40
V
DD
= 15 V
duty < 0.1 %
Rg
≥
50
Ω
30
20
10
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
REJ03G1721-0200 Rev.2.00 Jul 10, 2008
Page 4 of 6
RJK0351DSP
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance
γ
s (t)
10
1
D=1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
0.01
θch
- f(t) =
γs
(t) x
θch
- f
θch
- f = 83.3°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm)
e
uls
PDM
PW
T
0.001
h
1s
p
ot
D=
PW
T
0.0001
10
µ
100
µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (s)
Avalanche Test Circuit
Avalanche Waveform
1
2
L
•
I
AP2
•
V
DSS
V
DSS
– V
DD
V
(BR)DSS
I
AP
V
DD
V
DS
V
DS
Monitor
L
I
AP
Monitor
E
AR
=
Rg
D. U. T
I
D
Vin
15 V
50
Ω
0
V
DD
Switching Time Test Circuit
Vin Monitor
D.U.T.
Rg
R
L
V
DS
= 10 V
Vin
Vout
Vin
10 V
Vout
Monitor
Switching Time Waveform
90%
10%
10%
10%
90%
td(on)
tr
90%
td(off)
tf
REJ03G1721-0200 Rev.2.00 Jul 10, 2008
Page 5 of 6
电子竞赛
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
