TECHNICAL DATA
CMOS timer with RAM and I
2
C-bus control
.
INA8583N
INA8583N is a timer with RAM and I
2
C-bus control. Designed for use in ap-
pliances having I
2
C-bus as clock/calendar/timer/alarm/events counter for turn-
ing on functions of the appliance at preset time or upon completion of an
event. To be used in audio and appliances.
- I
2
C- bus interface operating supply voltage: 2.5 V to 6 V;
- Clock operating supply voltage ( 0÷70°С): 1.0 V to 6 V;
50 µА;
- Operating current (at f
SCL
= 0Hz):
- Clock function with four year calendar;
- 24 or 12 hour format;
- 32.768 kHz or 50Hz time base;
- Serial bus (I
2
C);
- Automatic word address in crementation;
- Programmable alarm, timer and interrupt function
;
- Operating temperature range: -20 to +70
О
С.
-
Features:
T
A
= -20° Tо 70° C
Table1 –
PIN ASSIGNMENT
OSCI
OSCO
A0
GND
SDA
SCL
INT
Vcc
Pin
1
2
3
4
5
6
7
8
Generator input, 50Hz or occurrences
Generator output
Address input
GND
Data for I
2
C-bus
Clock pulses for I
2
C-bus
Open-drain interrupt output
Supply voltage
Pinning diagram
OSCI
OSCO
A0
GND
1
2
3
4
8
7
6
5
Vcc
INT
SCL
SDA
Fig.1
1
INA8583
Block diagram INA8583N
INA8583N
OSCI
OSCO
INT
V
CC
GND
A0
SCL
SDA
I
2
C-bus
interface
Address
register
Power-on
reset
INA8583
OSCILLATOR
32.768kHz
Divider
1:256 or
100:128
100Hz
Control
logic
Control/status
Hundredth of a second
seconds
minutes
hours
Year/date
Weekday/months
timer
Alarm control
Alarm regisers
or RAM
RAM
(240х8)
00
01
07
08
0F
FF
Fig. 2.
2
INA8583
Table 2
– Recommend-operating conditions
Parameter
Symbol
Unit
Supply voltage, Vcc, V
operating
clock
Low input voltage, Vil,
V
High input voltage, Vih,
V
Operating ambient tem-
perature, Tamb,
°C
Input frequency,
f
I
, MHz
Limits
Not more
2.5
1.0
0
0.7*Vcc
-20
1
Not less
6.0
6.0
0.3*Vcc
Vcc
+70
Only for event
mode
Note
T
amb
=0÷+70°C
Table3 –
Absolute maximum rating
Parameter
Limits
Note
Symbol
Unit
Not more
Not less
Supply voltage, Vcc, V
-0.8
7,0
Input voltage for all inputs, V
I
, V
-0.8
Vcc+0.8 Note1
Max output current, Io, mA
10
Max input current, I
I
, mA
10
Current through inputs 04 or 08, I
DD
,
50
I
SS
, mА
Power dissipation on package,
Р
TOT
,
300
mW
Power dissipation on output ,
Р
О
, mW
50
-65
+150
Storage temperature, Tstg,
°С
Notes:
1. If voltage on diode is higher than V
CC
or lower than GND, the current will flow, the cur-
rent should be not more than
±0.5mA.
3
INA8583
Table 4
– Electrical parameters.
Parameter, Symbol
unit
Supply
Supply current ,Iсс, µA
Supply current for clock,
I
СС0
,
µA
Data storage supply cur-
rent, I
CCR
, µA
I
2
C
-bus enable level, V
POR
,
Limit
Not less
Not more
200
50
10
5
2
2.3
Testing con-
ditions
Tempera-
ture,
°C
Vcc=6V
T=-20
F
SCL
= 100kHz +25
+70
Vcc=5V
Vcc=1V
Note 1
V
CC
= 1V
V
CC
= 1V
Note 2
1.5
V
Input/output SDA
Low output current, I
OL
,
mA
Input leakage current,
|I
I
|,
µA
SCL, SDA
Input capacity,
С
I
,pF
Inputs A0, OSCI
Input leakage current,
|I
I
|,
nA
Output INT
Output low current, I
OL
,
mA
Input leakage current,
|I
I
|,
µA
3
1
Vcc= 6 V
Vol= 0.4 V
Vcc= 6 V
V
IL
= 0 V
V
IH
= 6 V
V
I
=0 V
Vcc= 6 V
V
IL
= 0 V
V
IH
= 6 V
Vcc=6.0 V
V
OL
=0,4 V
Vcc= 6 V
V
IL
= 0 V
V
IH
= 6 V
7
250
3
1
Notes:
1. For event mode or 50Hz only.
2. The I
2
C-bus logic is disabled if V
CC
<
V
POR
.
4
INA8583
INA8583N contains 256х8 RAM 8-bit. The word address register which is incremented automati-
cally, built-in 32.768 kHz oscillator circuit, frequency divider, interface of two line bi-directional
serial I
2
C-bus and power-on reset circuit.
The first 8 bits of the RAM (addresses 00÷07) are designated ass addressable 8-bit parallel
registers. The first register (address 00) is used as a control/status register. The memory addresses
01 to 07 are used as counters for the clock function. The memory address 08÷0F may be used as
free RAM locations or may be programmed as alarm registers.
The following modes can be selected by setting the control/status register:
Clock mode from 32.768 kHz;
Clock mode from 50 Hz;
Event counter mode.
In the clock mode hundredths of a second, seconds, minutes, hours, date, month (four-year
calendar) and a weekday are stored in a BCD format. The timer register stores up to 99 days. The
event counter mode is used for counting pulses applied to the oscillator input (OSCO left open-
circuit). In BCD format the event counter stores up to 6 digits.
By setting the alarm enabling bit of the control/status register the alarm control register (ad-
dress 08) is activated.
By setting the alarm control register the following may be programmed:
Dated alarm;
Weekday alarm;
Daily alarm;
Timer alarm.
In the clock mode the timer register (address 07) may be programmed to count hundredths
of a second, seconds, minutes, hours or days. Days are counted when an alarm is not programmed.
Whenever an alarm event occurs the alarm flag of the control/status register is set, and an
overflow condition of the timer will set the timer flag. The open drain interrupt output is switched
on (active LOW) when the alarm or timer flag is set. The flags remain set until directly reset by a
write operation to register (00 address).
When the alarm is disabled the remaining alarm registers (addresses 09÷0F) may be used as
free RAM.
In the clock modes 24hr or 12hr format can be selected by setting the most significant bit of
the hours counter register.
5
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