TECHNICAL DATA
IN74LS244
Octal 3-State Noninverting Buffer/Line
Driver/Line Receiver
These octal buffers and line drivers and designed specifically to
improve both the performance and density of three-state memory address
drivers, clock drivers, and busoriented receivers and transmitters.
This devise features high fan-out, improved fan-in, and 400 mV noise
margin.
It can be used to drive terminated lines down to 133 ohms.
•
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
•
P-N-P Inputs Reduce D-C Loading
•
Hysteresis at Inputs Improves Noise Margins
ORDERING INFORMATION
IN74LS244N Plastic
IN74LS244DW SOIC
T
A
= 0° to 70° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
PIN 20=V
CC
PIN 10 = GND
Enable A,
Enable B
L
L
H
X=don’t care
Z = high impedance
A,B
L
H
X
Outputs
YA,YB
L
H
Z
Rev. 00
IN74LS244
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
Tstg
*
Parameter
Supply Voltage
Input Voltage
Output Voltage
Storage Temperature Range
Value
7.0
7.0
5.5
-65 to +150
Unit
V
V
V
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
T
A
Supply Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Output Current
Low Level Output Current
Ambient Temperature Range
0
Parameter
Min
4.75
2.0
0.8
-15
24
+70
Max
5.25
Unit
V
V
V
mA
mA
°C
DC ELECTRICAL CHARACTERISTICS
over full operating conditions
Guaranteed Limit
Symbol
V
IK
V
OH
Parameter
Input Clamp Voltage
High Level Output Voltage
Test Conditions
V
CC
= min, I
IN
= -18 mA
V
CC
= min, I
OH
= -1.0 mA
V
CC
= min, I
OH
= -3.0 mA
V
CC
= min, I
OH
= -15 mA
V
OL
V
T+
- V
T-
I
OZH
I
OZL
I
IH
I
IL
I
O
I
CC
Low Level Output Voltage
Hysteresis
Output Off Current HIGH
Output Off Current LOW
High Level Input Current
Low Level Input Current
Output Short Circuit Current
Supply
Current
Outputs High
Outputs Low
All outputs
disabled
V
CC
= min, I
OL
= 12 mA
V
CC
= min, I
OL
= 24 mA
V
CC
= min
V
CC
= max, V
OUT
= 2.7 V
V
CC
= max, V
OUT
= 0.4 V
V
CC
= max, V
IN
= 2.7 V
V
CC
= max, V
IN
= 7.0 V
V
CC
= max, V
IN
= 0.4 V
V
CC
= max, V
O
=0 V
(Note 1)
V
CC
= max
Outputs open
-40
0.2
20
-20
20
0.1
-0.2
-225
27
46
54
2.7
2.4
2.0
0.4
0.5
V
μA
μA
μA
mA
mA
mA
mA
V
Min
Max
-1.5
Unit
V
V
note 1: Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one
second
Rev. 00
IN74LS244
AC ELECTRICAL CHARACTERISTICS
(T
A
= 25°C, V
CC
= 5.0 V, t
r
= 15 ns,
t
f
= 6.0 ns)
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay, Data to
Output
Propagation Delay, Data to
Output
Output Enable Time
Output Enable Time
Output Disable Time
Output Disable Time
C
L
= 5 pF
R
L
= 667
Ω
C
L
= 45 pF,
R
L
= 667
Ω
Test Condition
Min
Max
18
18
23
30
18
25
Unit
ns
ns
ns
ns
ns
ns
t
PZL
- S1 closed, S2 opened
t
PZH
- S1 opened, S2 closed
t
PLZ
, t
PHZ
- S1 and S2 closed
Figure 1. Switching Waveforms
(See Figure 3)
Figure 2. Switching Waveforms
(See Figure 4)
NOTES A. C
L
includes probe and jig capacitance.
B. All diodes are 1N916 or 1N3064.
Figure 3. Test Circuit
NOTES A. C
L
includes probe and jig capacitance.
B. All diodes are 1N916 or 1N3064.
Figure 4. Test Circuit
Rev. 00
IN74LS244
EXPANDED LOGIC DIAGRAM
Rev. 00
IN74LS244
N SUFFIX PLASTIC DIP
(MS - 001AD)
A
Dimension, mm
20
11
B
1
10
Symbol
A
B
C
MIN
24.89
6.1
MAX
26.92
7.11
5.33
F
L
D
F
0.36
1.14
2.54
7.62
0°
2.92
7.62
0.2
0.38
0.56
1.78
C
-T-
SEATING
PLANE
G
H
H
J
N
G
D
0.25 (0.010) M T
K
M
J
K
L
M
N
10°
3.81
8.26
0.36
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC
(MS - 013AC)
A
20
11
Dimension, mm
Symbol
MIN
12.6
7.4
2.35
0.33
0.4
1.27
9.53
0
°
0.1
0.23
10
0.25
8
°
0.3
0.32
10.65
0.75
MAX
13
7.6
2.65
0.51
1.27
H
B
P
A
B
1
G
10
C
R x 45
C
D
F
-T-
D
0.25 (0.010) M T C M
K
SEATING
PLANE
J
F
M
G
H
J
K
M
P
R
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B
‑
0.25 mm (0.010) per side.
Rev. 00
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
