TECHNICAL DATA
IN74HC123A
Dual Retriggerable Monostable
Multivibrator
The IN74HC123A is identical in pinout to the LS/ALS123. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
There are two trigger inputs, A INPUT (negative edge) and
B INPUT (positive edge). These inputs are valid for rising/falling signals.
The device may also be triggered by using the CLR input (positive-
edge) because of the Schmitt-trigger input; after triggering the output
maintains the MONOSTABLE state for the time period determined by the
external resistor R
X
and capacitor C
X
. Taking CLR low breaks this
MONOSTABLE STATE. If the next trigger pulse occurs during the
MONOSTABLE period it makes the MONOSTABLE period longer.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 3.0 to 6.0 V
•
Low Input Current: 1.0
µA
•
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC123AN Plastic
IN74HC123AD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
PIN 16 =V
CC
PIN 8 = GND
Note
(1) C
X
, R
X
, D
X
are external components.
(2) D
X
is a clamping diode.
The external capacitor is charged to V
CC
in the stand-by
state, i.e. no trigger. When the supply voltage is turned off
C
X
is discharged mainly through an internal parasitic diode.
If C
X
is sufficiently large and V
CC
decreases rapidy, there
will be some possibility of damaging the I.C. with a surge
current or latch-up. If the voltage supply filter capacitor is
large enough and V
CC
decrease slowly, the surge current is
automatically limited and damage the I.C. is avoided. The
maximum forward current of the parasitic diode is
approximately 20 mA.
A
Inputs
B
H
X
H
L
L
X
H
X
L
L
H
L
X
CLR
H
H
H
H
L
*
L
*
H
*
H
*
Outputs
Q
Q
Output
Enable
Inhibit
Inhibit
Output
Enable
Output
Enable
Inhibit
Note
X = don’t care
*
- except for monostable period
Rev. 00
IN74HC123A
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
A, B, CLR
C
X
, R
X
Value
-0.5 to +7.0
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±20
±30
±25
±50
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time - CLR
(Figure 2)
A or B
R
X
C
X
**
Min
3.0
**
0
-55
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
0
0
0
-
V
CC
<4.5 V
V
CC
≥
4.5 V
10
2.0
0
Max
6.0
V
CC
+125
1000
500
400
No
Limit
1000
1000
No
Limit
Unit
V
V
°C
ns
External Timing Resistor
External Timing Capacitor
kΩ
µF
The In74HC123 will function at 2.0 V but for optimum pulse width stability, V
CC
should be above
3.0 V.
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IN74HC123A
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-
Level Input
Voltage
Maximum Low -
Level Input
Voltage
Minimum High-
Level Output
Voltage
Test Conditions
V
OUT
=0.1 V or V
CC
-0.1 V
⎢I
OUT
⎢≤
20
µA
V
OUT
=0.1 V or V
CC
-0.1 V
⎢I
OUT
⎢ ≤
20
µA
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
20
µA
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
4.0 mA
⎢I
OUT
⎢ ≤
5.2 mA
V
OL
Maximum Low-
Level Output
Voltage
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
20
µA
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
4.0 mA
⎢I
OUT
⎢ ≤
5.2 mA
I
IN
Maximum Input
Leakage Current
(A, B, CLR)
Maximum Input
Leakage Current
(R
X
, C
X
)
Maximum
Quiescent Supply
Current
(per Package)
Standby State
V
IN
=V
CC
or GND
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
Guaranteed Limit
25
°C
to
-55°C
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
≤85
°C
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
≤125
°C
1.5
3.15
4.2
0.5
1.35
1.8
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1.0
µA
V
Unit
V
V
IL
V
V
OH
V
I
IN
V
IN
=V
CC
or GND
6.0
±50
±500
±500
nA
I
CC
V
IN
=V
CC
or GND
Q1 and Q2 = Low
I
OUT
=0µA
6.0
130
220
350
µA
25°C
-45°C
to
85°C
600
-55°C
to
125°C
800
µA
I
CC
Maximum Supply
Current
(per Package)
Active State
V
IN
=V
CC
or GND
Q1 and Q2 = High
I
OUT
=0µA
Pins 15 and 7 = 0.5 V
CC
6.0
400
Rev. 00
IN74HC123A
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
Parameter
V
Guaranteed Limit
25
°C
to
-55°C
255
50
45
215
45
35
75
16
14
10
25
≤85
°C
320
65
55
270
55
45
95
20
17
10
25
≤125
°C
385
75
65
325
65
55
110
22
20
10
25
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, Input A or B to Q
or Q (Figures 1 and 3)
Maximum Propagation Delay , CLR to Q or Q
(Figures 2 and 3)
Maximum Output Transition Time, Any
Output(Figures 2 and 3)
Maximum Input Capacitance
A, B, CLR
C
X
, R
X
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
-
ns
t
PLH
, t
PHL
ns
t
TLH
, t
THL
ns
C
IN
pF
Power Dissipation Capacitance
(Per Multivibrator)
C
PD
Used to determine the no-load dynamic power
consumption:
P
D
=C
PD
V
CC2
f+I
CC
V
CC
Typical @25°C,V
CC
=5.0 V
150
pF
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
t
rec
Parameter
Minimum Recovery Time,
Inactive to A or B
(Figure 2)
Minimum Pulse Width,
Input A or B (Figure 1)
Minimum Pulse Width,
CLR (Figure 2)
Maximum Input Rise and
Fall Times, CLR
(Figure 2)
A or B (Figure 2)
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
25
°C
to
-55°C
0
0
0
100
20
17
100
20
17
1000
500
400
Guaranteed Limit
≤85°C
0
0
0
125
25
20
125
25
20
1000
500
400
No Limit
≤125°C
0
0
0
150
30
25
150
30
25
1000
500
400
Unit
ns
t
w
ns
t
w
ns
t
r,
t
r
ns
Rev. 00
IN74HC123A
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Test Circuit
Rev. 00
嵌入式系统
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