Si3831DV
Vishay Siliconix
Bi-Directional P-Channel MOSFET/Power Switch
PRODUCT SUMMARY
V
DS
(V)
"7
r
DS(on)
(W)
0.170 @ V
GS
= –4.5 V
0.240 @ V
GS
= –2.5 V
I
D
(A)
"2.4
"2.0
FEATURES
D
D
D
D
Low r
DS(on)
Symmetrical P-Channel MOSFET
Integrated Body Bias For Bi-Directional Blocking
2.5- to 5.5-V Operation
Exceeds
"2
kV ESD Protected
D
Solution for High-Side Battery Disconnect Switching (BDS)
D
Supports Battery Switching in Multiple Battery Cell
Phones, PDAs and PCS Products
D
Low Profile, Small Footprint TSOP-6 Package
DESCRIPTION
The Si3831DV is a low on-resistance p-channel power
MOSFET providing bi-directional blocking and conduction.
Bi-directional blocking is facilitated by combining a 4-terminal
symmetric p-channel MOSFET with a body bias selector
circuit*. Circuit operation automatically biases the p-channel
body to the most positive source/drain potential thereby
maintaining a reverse bias across the diode present between
the source/drain terminals.
Off-state device blocking
characteristics are symmetric, facilitating bi-directional
blocking for high-side battery switching in portable products.
Gate drive is facilitated by negatively biasing the gate relative
to the body potential. The off-state is achieved by biasing the
gate to the most positive supply voltage or to the body
potential. The Si3831DV is available in a 6-pin TSOP-6
package rated for the –25 to 85°C commercial temperature
range.
APPLICATION CIRCUITS
AC/DC
Adapter
Charger
Body
Bias
Loads
Body
Bias
Si3831DV
DC/DC
Si3831DV
Body
Bias
Body
Bias
Si3831DV
Si3831DV
Charger
FIGURE 1.
Charger Demultiplexing
FIGURE 2.
Battery Multiplexing (High-Side Switch)
*Patents pending.
Document Number: 70785
S-56947—Rev. C, 28-Dec-98
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Si3831DV
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
S/D
(6)
TSOP-6
Top View
BODY
Body
Bias
Generator
1
6
S/D
P-Channel MOSFET
G
(3)
ESD
Protection
3 mm
SUB
2
5
SUB
G
3
4
D/S
D/S
(4)
BODY
(1)
SUBSTRATE (GND)
(2, 5)
2.75 mm
FIGURE 3.
FIGURE 4.
ABSOLUTE MAXIMUM RATINGS (T
A
= 25_C UNLESS OTHERWISE NOTED)
Parameter
Drain-Source Voltage, Source-Drain Voltage
a
Source-Body/Drain-Body/Gate-Body Voltage
Body-Substrate Voltage
Continuous Drain-to-Source Current (T
J
= 150_C)
a, b
Pulsed Drain-to-Source Current
a
Maximum Power Dissipation
b
Operating Junction and Storage Temperature Range
T
A
= 25_C
T
A
= 70_C
T
A
= 25_C
T
A
= 70_C
Symbol
V
DS
V
SB
, V
DB
, V
GB
V
BSUB
I
D
I
DM
P
D
T
J
, T
stg
Limit
–7.0 to +7.0
0.3 to –7.0
+7.0 to –0.3
"2.4
"2.0
"8
1.5
1.0
–55 to 150
Unit
V
A
W
_C
RECOMMENDED OPERATING RANGE
Parameter
Drain-Source Voltage
a
Gate-Drain,/Gate-Source Voltage
Source-Body/Drain-Body/Gate-Body Voltage
Drain-to-Source Current
a, b
Body-Source Current
Symbol
V
DS
, V
DS
V
GD
, V
GS
V
SB
, V
DB
, V
GB
I
DS
I
BS
Range
–5.5 to 5.5
0 to –5.5
0 to –5.5
"2.4
0 to 10
Unit
V
A
mA
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambient
b
Symbol
R
thJA
Limit
80
125
Unit
_C/W
C/W
Notes
a. Bi-directional.
b. Surface Mounted on FR4 Board, t
v
5 sec.
c. Surface Mounted on FR4 Board, Steady–State.
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Document Number: 70785
S-56947—Rev. C, 28-Dec-98
2-2
Si3831DV
Vishay Siliconix
SPECIFICATIONS (V
BS
= 0 V, T
J
= 25_C UNLESS OTHERWISE NOTED)
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
V
GS(th)
I
GSS
I
DSS
V
DS
= V
GS
, I
D
= –250
mA
V
DS
= 0 V, V
GS
= –5.5 V to +0.3 V
V
DS
= –5.5 V, V
GS
= 0 V, V
SB
= 0 V
V
DS
= –5.5 V, V
GS
= 0 V, V
SB
= 0 V, T
J
= 70_C
V
DS
= –3 V, V
GS
= –4.5 V
V
DS
= –3 V, V
GS
= –2.5 V
V
GS
= –4.5 V, I
D
= –2.4 A
r
DS( )
DS(on)
V
GS
= –2.5 V, I
D
= –2.0 A
–8
A
–3
0.130
0.180
0.170
0.240
W
–0.4
"100
–1
–5
V
nA
mA
Symbol
Test Condition
Min
Typ
Max
Unit
On-State Drain Current
a
I
D(on)
Drain Source On State Resistance
a
Drain-Source On-State
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
V
DD
= –3 V, R
L
= 3
W
3 V,
I
D
^
–1.0 A, V
GEN
= –4.5 V R
G
= 6
W
10A
4 5 V,
V
DS
= –5 V, V
GS
= –4.5 V I
D
= –2.4 A
5V
4 5 V,
24
2.0
0.23
0.14
12
55
90
85
25
110
ns
180
170
4.0
nC
C
Notes
a. Pulse test; pulse width
v
300
ms,
duty cycle
v
2%.
b. Guaranteed by design, not subject to production testing.
GATE BUFFER REFERENCE
Body
Bias
Body
Bias
Si3831DV
Load
Si3831DV
Load
IN
IN
FIGURE 5.
Gate Buffer Referenced to Most Positive Supply
FIGURE 6.
Gate Buffer Referenced to Body Bias Pin
Document Number: 70785
S-56947—Rev. C, 28-Dec-98
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2-3
Si3831DV
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Output Characteristics
8
V
GS
= 5 thru 3 V
2.5 V
6
I
D
– Drain Current (A)
I
D
– Drain Current (A)
6
8
T
C
= –55_C
25_C
Transfer Characteristics
2V
4
125_C
4
1.5 V
2
1V
0
0
1
2
3
4
5
2
0
0
0.5
1.0
1.5
2.0
2.5
3.0
V
DS
– Drain-to-Source Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
On-Resistance vs. Drain Current
0.4
250
Capacitance
r
DS(on)
– On-Resistance (
W
)
200
C – Capacitance (pF)
0.3
C
oss
150
C
iss
0.2
V
GS
= 2.5 V
V
GS
= 4.5 V
100
0.1
50
C
rss
0
0
2
4
I
D
– Drain Current (A)
6
8
0
0
1
2
3
4
5
6
V
DS
– Drain-to-Source Voltage (V)
4.5
V
DS
= 3 V
I
D
= 2.4 A
Gate Charge
1.4
1.3
r
DS(on)
– On-Resistance (
W
)
(Normalized)
1.2
1.1
1.0
0.9
0.8
0.7
–50
On-Resistance vs. Junction Temperature
V
GS
– Gate-to-Source Voltage (V)
3.6
V
GS
= 4.5 V
I
D
= 2.4 A
2.7
1.8
0.9
0
0
0.4
0.8
1.2
1.6
2.0
Q
g
– Total Gate Charge (nC)
–25
0
25
50
75
100
125
150
T
J
– Junction Temperature (_C)
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Document Number: 70785
S-56947—Rev. C, 28-Dec-98
Si3831DV
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
Source-Drain Diode Forward Voltage
8
0.5
On-Resistance vs. Gate-to-Source Voltage
T
J
= 150_C
1
T
J
= 25_C
r
DS(on)
– On-Resistance (
W
)
0.4
I
S
– Source Current (A)
0.3
I
D
= 2.4 A
I
D
= 0.5 A
0.2
0.1
0.1
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0
0
1
2
3
4
5
6
V
SD
– Source-to-Drain Voltage (V)
V
GS
– Gate-to-Source Voltage (V)
Threshold Voltage
0.4
15
Single Pulse Power
0.3
12
V
GS(th)
Variance (V)
0.2
I
D
= 250
mA
0.1
Power (W)
9
6
0.0
3
–0.1
–0.2
–50
–25
0
25
50
75
100
125
150
0
0.01
0.10
Time (sec)
1.00
10.00
T
J
– Temperature (_C)
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
1
Duty Cycle = 0.5
Normalized Effective Transient
Thermal Impedance
0.2
Notes:
0.1
0.1
0.05
0.02
P
DM
t
1
t
2
1. Duty Cycle, D =
t
1
t
2
2. Per Unit Base = R
thJA
= 80_C/W
3. T
JM
– T
A
= P
DM
Z
thJA(t)
Single Pulse
0.01
10
–4
10
–3
10
–2
10
–1
4. Surface Mounted
1
10
30
Square Wave Pulse Duration (sec)
Document Number: 70785
S-56947—Rev. C, 28-Dec-98
www.vishay.com
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FaxBack 408-970-5600
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