TECHNICAL DATA
IN74HC258A
Quad 2-Input Data Selectors/Multiplexer
with 3-State Outputs
High-Performance Silicon-Gate CMOS
The IN74HC258A is identical in pinout to the LS/ALS258. The
device inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
This device selects a (4-bit) nibble from either the A or B inputs as
determined by the Select input. The nibble is presented at the outputs in
inverted form when the Output Enable pin is at a low level. A high level
on the Output Enable pin switches the outputs into the high-impedance
state.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
µA
•
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC258AN Plastic
IN74HC258AD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Output
Enable
H
PIN 16 =V
CC
PIN 8 = GND
L
L
Select
X
L
H
Outputs
Y0-Y3
Z
A0-A3
B0-B3
X=don’t care
Z = high-impedance state
A0-A3,B0-B3=the levels of the respective
Nibble Inputs
Rev. 00
IN74HC258A
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +7.0
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±20
±35
±75
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
Min
2.0
0
-55
0
0
0
Max
6.0
V
CC
+125
1000
500
400
Unit
V
V
°C
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IN74HC258A
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
Parameter
Test Conditions
V
Guaranteed Limit
25
°C
to
-55°C
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
±0.5
≤85
°C
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
±5.0
≤125
°C
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1.0
±10
µA
µA
V
Unit
V
IH
Minimum High-
Level Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-
Level Output Voltage
V
OUT
=0.1 V or V
CC
-0.1 V
⎢I
OUT
⎢≤
20
µA
V
OUT
=0.1 V or V
CC
-0.1 V
⎢I
OUT
⎢ ≤
20
µA
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
20
µA
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
6.0 mA
⎢I
OUT
⎢ ≤
7.8 mA
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
V
V
IL
V
V
OH
V
V
OL
Maximum Low-
Level Output Voltage
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
20
µA
V
IN
=V
IH
or V
IL
⎢I
OUT
⎢ ≤
6.0 mA
⎢I
OUT
⎢ ≤.7.8
mA
I
IN
I
OZ
Maximum Input
Leakage Current
Maximum Three-
State Leakage
Current
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or GND
Output in High-Impedance
State
V
IN
= V
IL
or V
IH
V
OUT
= V
CC
or GND
V
IN
=V
CC
or GND
I
OUT
=0µA
I
CC
6.0
8.0
80
160
µA
Rev. 00
IN74HC258A
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
Parameter
V
Guaranteed Limit
25
°C
to
-55°C
100
20
17
160
32
18
150
30
26
110
22
20
60
12
10
10
15
≤85°C
≤125°C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay, Nibble A or B to
Output Y (Figures 1and 4)
Maximum Propagation Delay , Select to
Output Y (Figures 2 and 4)
Maximum Propagation Delay , Output Enable to
Output Y (Figures 3 and 5)
Maximum Propagation Delay , Output Enable to
Output Y (Figures 3 and 5)
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
Maximum Input Capacitance
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
Power Dissipation Capacitance (Per Package)
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
-
-
125
25
21
200
40
35
190
38
33
140
28
25
75
15
13
10
15
150
30
26
240
48
42
225
45
38
165
34
30
90
18
15
10
15
ns
t
PLH
, t
PHL
ns
t
PLZ
, t
PHZ
ns
t
PZL
, t
PZH
ns
t
TLH
, t
THL
ns
C
IN
C
OUT
pF
pF
Typical @25°C,V
CC
=5.0 V
59
pF
C
PD
Used to determine the no-load dynamic power
consumption:
P
D
=C
PD
V
CC2
f+I
CC
V
CC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Rev. 00
IN74HC258A
Figure 3. Switching Waveforms
Figure 4. Test Circuit
Figure 5. Test Circuit
EXPANDED LOGIC DIAGRAM
Rev. 00
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
