TECHNICAL DATA
IN74HC192A
Presettable BCD/Decade UP/DOWN Counter
High-Performance Silicon-Gate CMOS
The IN74HC192A is identical in pinout to the LS/ALS192. The device
inputs are compatible with standard CMOS outputs; with pullup resistors,
they are compatible with LS/ALSTTL outputs.
The counter has two separate clock inputs, a Count Up Clock and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs. This counter may be preset
by entering the desired data on the P0, P1, P2, P3 input. When the Parallel
Load input is taken low the data is loaded independently of either clock
input. This feature allows the counters to be used as devide-by-n by
modifying the count lenght with the preset inputs. In addition the counter
can also be cleared. This is accomplished by inputting a high on the
Master Reset input. All 4 internal stages are set to low independently of
either clock input.Both a Terminal Count Down (TC
D
) and Terminal
Count Up (TC
U
) Outputs are provided to enable cascading of both up and
down counting functions. The TC
D
output produces a negative going pulse
when the counter underflows and TC
U
outputs a pulse when the counter
overflows. The counter can be cascaded by connecting the TC
U
and TC
D
outputs of one device to the Count Up Clock and Count Down Clock
inputs, respectively, of the next device.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
µA
•
High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
IN74HC192AN Plastic
IN74HC192AD SOIC
T
A
= -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
Rev. 00
IN74HC192A
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +7.0
-1.5 to V
CC
+1.5
-0.5 to V
CC
+0.5
±20
±25
±50
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
A
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
V
CC
=2.0 V
V
CC
=4.5 V
V
CC
=6.0 V
Min
2.0
0
-55
0
0
0
Max
6.0
V
CC
+125
1000
500
400
Unit
V
V
°C
ns
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IN74HC192A
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
Parameter
Test Conditions
V
Guaranteed Limit
25
°C
to
-55°C
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.98
5.48
0.1
0.1
0.1
0.26
0.26
±0.1
8.0
≤85
°C
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.84
5.34
0.1
0.1
0.1
0.33
0.33
±1.0
80
≤125
°C
1.5
3.15
4.2
0.3
0.9
1.2
1.9
4.4
5.9
3.7
5.2
0.1
0.1
0.1
0.4
0.4
±1.0
160
µA
µA
V
Unit
V
IH
Minimum High-Level
Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-Level
Output Voltage
V
OUT
=0.1 V or V
CC
-0.1 V
I
OUT
≤
20
µA
V
OUT
=0.1 V or V
CC
-0.1 V
I
OUT
≤
20
µA
V
IN
=V
IH
or V
IL
I
OUT
≤
20
µA
V
IN
=V
IH
or V
IL
I
OUT
≤
4.0 mA
I
OUT
≤
5.2 mA
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
2.0
4.5
6.0
4.5
6.0
6.0
6.0
V
V
IL
V
V
OH
V
V
OL
Maximum Low-Level
Output Voltage
V
IN
=V
IH
or V
IL
I
OUT
≤
20
µA
V
IN
=V
IH
or V
IL
I
OUT
≤
4.0 mA
I
OUT
≤
5.2 mA
I
IN
I
CC
Maximum Input
Leakage Current
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or GND
V
IN
=V
CC
or GND
I
OUT
=0µA
FUNCTION TABLE
Inputs
PL
CP
U
X
X
Mode
CP
D
X
X
H
H
Reset(Asyn.)
Preset(Asyn.)
No Count
Count Up
Count Down
No Count
The IN74HC192 can be preset to any state, but
will not count beyond 9. If preset to state 10, 11, 12,
13, 14 or 15, it will follow the sequence 10, 11, 6: 12,
13, 4: 14, 15, 2 if counting Up, and follow the
sequence 15, 14, 13, 12, 11, 10, 9 if counting Down.
Logic equations
For Terminal Count:
TC
U
= Q
0
•
Q
3
•
CP
U
TC
D
= Q
0
•
Q
1
•
Q
2
•
Q
3
•
CP
D
MR
H
X
L
L
L
H
L
H
L
H
L
H
X = don’t care
H
H
Rev. 00
IN74HC192A
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
f
max
Parameter
Minimum Clock Frequency (50% Duty Cycle)
(Figures 1 and 6)
Maximum Propagation Delay, Clock to Q
(Figures 1 and 6)
Maximum Propagation Delay, PL to Q
(Figures 3 and 6)
Maximum Propagation Delay, Clock to Terminal
Count (Figures 2 and 6)
Maximum Output Transition Time,Any Output
(Figures 1 and 6)
Maximum Input Capacitance
Power Dissipation Capacitance (Per Package)
C
PD
Used to determine the no-load dynamic power
consumption: P
D
=C
PD
V
CC2
f+I
CC
V
CC
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
-
Guaranteed Limit
25
°C
to
-55°C
12
36
43
215
43
37
215
43
37
125
25
21
75
15
13
10
≤85°C
3.2
16
19
270
54
46
270
54
46
155
31
26
95
20
18
10
≤125°C
2.6
13
15
325
65
55
325
65
55
190
38
32
110
23
20
10
Unit
MHz
t
PLH
, t
PHL
ns
t
PLH
, t
PHL
ns
t
PLH
, t
PHL
ns
t
TLH
, t
THL
ns
C
IN
pF
Typical @25°C,V
CC
=5.0 V
60
pF
TIMING REQUIREMENTS
(C
L
=50pF,Input t
r
=t
f
=6.0 ns)
V
CC
Symbol
t
su
Parameter
Minimum Setup Time, Pn to PL
(Figure 4)
Minimum Hold Time, Pn to PL
(Figure 4)
Minimum Pulse Width, Clock (Figure
1)
Minimum Pulse Width, PL
(Figure 3)
Minimum Pulse Width, MR
(Figure 5)
Minimum Input Rise and Fall Times
(Figure 1)
V
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
2.0
4.5
6.0
100
20
18
0
0
0
150
30
26
100
20
17
100
20
17
100
500
400
Guaranteed Limit
25
°C
to -55°C
≤85°C
125
35
22
0
0
0
190
38
33
125
25
26
125
25
26
100
500
400
≤125°C
150
30
26
0
0
0
225
45
38
150
30
26
150
30
26
100
500
400
Unit
ns
t
h
ns
t
w
ns
t
w
ns
t
w
ns
t
r
, t
f
ns
Rev. 00
IN74HC192A
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Switching Waveforms
Figure 5. Switching Waveforms
Figure 6. Test Circuit
Rev. 00
单片机
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