VS-ST330C Series
www.vishay.com
Vishay Semiconductors
Phase Control Thyristors
(Hockey PUK Version), 720 A
FEATURES
• Center amplifying gate
• Metal case with ceramic insulator
• International standard case TO-200AB (E-PUK)
• Designed and qualified for industrial level
• Material categorization: For definitions of compliance
please see
www.vishay.com/doc?99912
TO-200AB (E-PUK)
RoHS
COMPLIANT
TYPICAL APPLICATIONS
• DC motor controls
• Controlled DC power supplies
PRODUCT SUMMARY
Package
Diode variation
I
T(AV)
V
DRM
/V
RRM
V
TM
I
GT
T
J
TO-200AB (E-PUK)
Single SCR
720 A
400 V, 800 V, 1200 V, 1400 V, 1600 V
1.96 V
100 mA
-40 °C to 125 °C
• AC controllers
MAJOR RATINGS AND CHARACTERISTICS
PARAMETER
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
V
DRM
/V
RRM
t
q
T
J
Typical
T
hs
T
hs
50 Hz
60 Hz
50 Hz
60 Hz
TEST CONDITIONS
VALUES
720
55
1420
25
9000
9420
405
370
400 to 1600
100
-40 to 125
UNITS
A
°C
A
°C
A
kA
2
s
V
μs
°C
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
04
08
VS-ST330C..C
12
14
16
V
DRM
/V
RRM
, MAXIMUM REPETITIVE
PEAK AND OFF-STATE VOLTAGE
V
400
800
1200
1400
1600
V
RSM
, MAXIMUM
I
DRM
/I
RRM
MAXIMUM
NON-REPETITIVE PEAK VOLTAGE
AT T
J
= T
J
V
MAXIMUM mA
500
900
1300
1500
1700
50
Revision: 20-Dec-13
Document Number: 94407
1
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THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
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VS-ST330C Series
www.vishay.com
Vishay Semiconductors
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Maximum average on-state current
at heatsink temperature
Maximum RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
TEST CONDITIONS
180° conduction, half sine wave
double side (single side) cooled
DC at 25 °C heatsink temperature double side cooled
t = 10 ms
Maximum peak, one-cycle
non-repetitive surge current
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
√t
for fusing
Low level value of threshold voltage
High level value of threshold voltage
Low level value of on-state slope resistance
High level value of on-state slope resistance
Maximum on-state voltage
Maximum holding current
Typical latching current
I
2
√t
V
T(TO)1
V
T(TO)2
r
t1
r
t2
V
TM
I
H
I
L
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
100 % V
RRM
reapplied
VALUES
720 (350)
55 (75)
1420
9000
9420
7570
Sinusoidal half wave,
initial T
J
= T
J
maximum
7920
405
370
287
262
4050
0.91
0.92
0.58
0.57
1.96
600
1000
kA
2
√s
V
kA
2
s
A
UNITS
A
°C
t = 0.1 to 10 ms, no voltage reapplied
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
(16.7 % x
π
x I
T(AV)
< I <
π
x I
T(AV)
), T
J
= T
J
maximum
(I >
π
x I
T(AV)
), T
J
= T
J
maximum
I
pk
= 1810 A, T
J
= T
J
maximum, t
p
= 10 ms sine pulse
T
J
= 25 °C, anode supply 12 V resistive load
mΩ
V
mA
SWITCHING
PARAMETER
Maximum non-repetitive rate of
rise of turned-on current
Typical delay time
Typical turn-off time
SYMBOL
dI/dt
t
d
t
q
TEST CONDITIONS
Gate drive 20 V, 20
Ω,
t
r
≤
1 μs
T
J
= T
J
maximum, anode voltage
≤
80 % V
DRM
Gate current 1 A, dI
g
/dt = 1 A/μs
V
d
= 0.67 % V
DRM
, T
J
= 25 °C
I
TM
= 550 A, T
J
= T
J
maximum, dI/dt = 40 A/μs,
V
R
= 50 V, dV/dt = 20 V/μs, gate 0 V 100
Ω,
t
p
= 500 μs
VALUES
1000
1.0
µs
100
UNITS
A/µs
BLOCKING
PARAMETER
Maximum critical rate of rise of
off-state voltage
Maximum peak reverse and
off-state leakage current
SYMBOL
dV/dt
I
RRM
,
I
DRM
TEST CONDITIONS
T
J
= T
J
maximum linear to 80 % rated V
DRM
T
J
= T
J
maximum, rated V
DRM
/V
RRM
applied
VALUES
500
50
UNITS
V/µs
mA
Revision: 20-Dec-13
Document Number: 94407
2
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
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VS-ST330C Series
www.vishay.com
Vishay Semiconductors
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak positive gate current
Maximum peak positive gate voltage
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
+ V
GM
- V
GM
TEST CONDITIONS
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= T
J
maximum, f = 50 Hz, d% = 50
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= T
J
maximum, t
p
≤
5 ms
T
J
= -40 °C
DC gate current required to trigger
I
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= -40 °C
DC gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
DC gate current not to trigger
I
GD
T
J
= T
J
maximum
DC gate voltage not to trigger
V
GD
Maximum gate current/voltage
not to trigger is the maximum
value which will not trigger any
unit with rated V
DRM
anode to
cathode applied
Maximum required gate trigger/
current/voltage are the lowest
value which will trigger all units
12 V anode to cathode applied
200
100
50
2.5
1.8
1.1
10
VALUES
TYP.
MAX.
UNITS
10.0
2.0
3.0
20
5.0
-
200
-
-
3.0
-
W
A
V
mA
V
mA
0.25
V
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Maximum operating junction temperature range
Maximum storage temperature range
Maximum thermal resistance, junction to heatsink
SYMBOL
T
J
T
Stg
R
thJ-hs
DC operation single side cooled
DC operation double side cooled
DC operation single side cooled
DC operation double side cooled
TEST CONDITIONS
VALUES
-40 to 125
-40 to 150
0.09
0.04
0.02
0.01
9800
(1000)
83
See dimensions - link at the end of datasheet
N
(kg)
g
K/W
UNITS
°C
Maximum thermal resistance, case to heatsink
Mounting force, ± 10 %
Approximate weight
Case style
R
thC-hs
TO-200AB (E-PUK)
ΔR
thJ-hs
CONDUCTION
CONDUCTION ANGLE
180°
120°
90°
60°
30°
SINUSOIDAL CONDUCTION
SINGLE SIDE
0.012
0.014
0.017
0.025
0.043
DOUBLE SIDE
0.011
0.012
0.015
0.022
0.036
RECTANGULAR CONDUCTION
SINGLE SIDE
0.008
0.014
0.019
0.026
0.043
DOUBLE SIDE
0.007
0.013
0.017
0.023
0.037
T
J
= T
J
maximum
K/W
TEST CONDITIONS
UNITS
Note
• The table above shows the increment of thermal resistance R
thJ-hs
when devices operate at different conduction angles than DC
Revision: 20-Dec-13
Document Number: 94407
3
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST330C Series
www.vishay.com
Vishay Semiconductors
Maximum Allowable Heats T
ink emperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
10
0
200 400 600 800 1000 1200 1400 1600
Average On-state Current (A)
30°
60°
90°
120°
180°
DC
Conduction Period
Maximum Allowable Heats Temperature (°C)
ink
130
120
110
100
90
80
70
0
30°
S 330C..C S
T
eries
(S
ingle S Cooled)
ide
R
thJ-hs
(DC) = 0.09 K/ W
S 330C..C S
T
eries
(Double S Cooled)
ide
R
thJ-hs
(DC) = 0.04 K/ W
Conduction Angle
60°
90°
120°
180°
50 100 150 200 250 300 350 400
Average On-state Current (A)
Fig. 1 - Current Ratings Characteristics
Fig. 4 - Current Ratings Characteristics
Maximum Allowable Heats T
ink emperature (°C)
Maximum Average On-state Power Los (W)
s
130
120
110
100
90
80
70
60
50
40
30
20
0
30°
S 330C..C S
T
eries
(S
ingle S Cooled)
ide
R
thJ-hs
(DC) = 0.09 K/ W
1400
1200
1000
800
600
Conduction Angle
180°
120°
90°
60°
30°
RMS Limit
Conduction Period
400
200
0
0
100 200 300 400 500 600 700 800
Average On-s
tate Current (A)
S 330C..C S
T
eries
T = 125°C
J
60°
90°
120° 180°
DC
100 200 300 400 500 600 700 800 900
Average On-s
tate Current (A)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - On-State Power Loss Characteristics
Maximum Allowable Heatsink T
emperature (°C)
130
120
110
100
90
80
70
60
50
40
30
20
0
200
30°
Maximum Average On-state Power Los (W)
s
S 330C..C S
T
eries
(Double S Cooled)
ide
R
thJ-hs
(DC) = 0.04 K/ W
1800
1600
1400
1200
DC
180°
120°
90°
60°
30°
Conduction Angle
1000 RMSLimit
800
600
400
200
0
0
200
400
600
800
1000 1200
Average On-state Current (A)
S 330C..C S
T
eries
T = 125°C
J
Conduction Period
60°
90°
120°
180°
400
600
800
1000
Average On-state Current (A)
Fig. 3 - Current Ratings Characteristics
Fig. 6 - On-State Power Loss Characteristics
Revision: 20-Dec-13
Document Number: 94407
4
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
VS-ST330C Series
www.vishay.com
Vishay Semiconductors
Peak Half S Wave On-state Current (A)
ine
9000
8500
ine
Peak Half S Wave On-state Current (A)
8000
7500
7000
6500
6000
5500
5000
4500
4000
3500
1
At Any Rated Load Condition And With
Rated V
RRM
Applied Following S
urge.
Initial T = 125°C
J
@60 Hz 0.0083 s
@50 Hz 0.0100 s
Maximum Non R
epetitive S
urge Current
Versus Pulse T
rain Duration. Control
Of Conduc tion May Not Be Maintained.
8000
Initial T = 125°C
J
7500
No Voltage Reapplied
R
ated V
RRM
Reapplied
7000
6500
6000
5500
5000
4500
4000
S 330C..C S
T
eries
S 330C..C S
T
eries
10
100
3500
0.01
0.1
Pulse T
rain Duration (s)
1
Number Of Equal Amplitude Half Cycle Current Pulses (N)
Fig. 7 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
Fig. 8 - Maximum Non-Repetitive Surge Current
Single and Double Side Cooled
10000
Instantaneous On-state Current (A)
T = 25°C
J
T = 125°C
J
1000
S
T330C..C S
eries
100
0
1
2
3
4
5
6
7
Instantaneous On-state Voltage (V)
Fig. 9 - On-State Voltage Drop Characteristics
T
ransient T
hermal Impedance Z
thJ-hs
(K/ W)
0.1
S
teady S
tate Value
R
thJ-hs
= 0.09 K/ W
(S
ingle S
ide Cooled)
R
thJ-hs
= 0.04 K/ W
(Double S Cooled)
ide
(DC Operation)
0.01
S 330C..C S
T
eries
0.001
0.001
0.01
0.1
S
quare Wave Pulse Duration (s)
1
10
Fig. 10 - Thermal Impedance Z
thJ-hs
Characteristics
Revision: 20-Dec-13
Document Number: 94407
5
For technical questions within your region:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000