DICE/DWF SPECIFICATION
RH1573K
Low Dropout PNP
Regulator Driver
5
6
4
PAD FUNCTION
1.
2.
3.
4.
5.
6.
7.
8.
9.
DRIVE
V
IN
V
OUT
COMP
GND1**
FB
LATCH
SHDN
GND2**
DIE CROSS REFERENCE
LTC Finished
Part Number
RH1573K
†
RH1573K
†
Order
Part Number
RH1573KDICE
†
RH1573KDWF*,
†
7
3
8
9
2
Please refer to LTC standard product data sheet for
other applicable product information.
*DWF = DICE in wafer form.
1
**GND1 and GND2 are
connected together to
form GND
61mils
×
72mils,
12mils thick.
†
Backside metal: Alloyed gold layer
(K designator)
Backside potential: lowest (GND) voltage
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
DICE/DWF ELECTRICAL TEST LIMITS
PARAMETER
Reference Voltage
Line Regulation (V
FB
)
Load Regulation (V
FB
)
FB Pin Bias Current
DRIVE Pin Current
DRIVE Pin Saturation Voltage
CONDITIONS
T
A
= 25°C.
MIN
1.252
MAX
1.278
2
18
4
1.2
290
0.2
1
UNITS
V
mV
mV
μA
mA
mA
V
V
I
DRIVE
= 20mA, T
J
= 25°C
I
DRIVE
= 20mA, 3V < V
IN
< 7V
I
DRIVE
= 20mA to 250mA
V
FB
= 1.265V
V
FB
= 1.35V, V
DRIVE
= 7V
V
FB
= 1.15V, V
DRIVE
= 1.5V
I
DRIVE
= 20mA, V
FB
= 1.15V
I
DRIVE
= 250mA, V
FB
= 1.15V
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
DICE/DWF SPECIFICATION
RH1573K
DICE/DWF ELECTRICAL TEST LIMITS
PARAMETER
SHDN Pin Threshold Voltage
SHDN Pin Current
LATCH Pin Latch-Off Threshold Voltage
LATCH Pin Charging Current
LATCH Pin Latching Current
V
IN
to V
OUT
Differential Threshold for Latch
Disable
Input Quiescent Current
Minimum Input Voltage for Bias Operation
Note 1:
For circuit operation and application information refer to LT1573
data sheet.
V
IN
= 7V
2.4
Note 2:
For post radiation performance contact factory.
0.55
V
SHDN
= 5V
1.1
4
CONDITIONS
T
A
= 25°C.
MIN
1
MAX
1.5
300
1.8
10
0.85
0.8
2.8
UNITS
V
μA
V
μA
mA
V
mA
V
Wafer level testing is performed per the indicated specifications for dice. Considerable differences in performance can often be observed for dice versus
packaged units due to the influences of packaging and assembly on certain devices and/or parameters. Please consult factory for more information
on dice performance and lot qualifications via lot sampling test procedures.
Dice data sheet subject to change. Please consult factory for current revision in production.
I.D.No. 66-13-rh1573
2
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
LT 0808 • PRINTED IN USA
www.linear.com
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LINEAR TECHNOLOGY CORPORATION 2008
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