DICE/DWF SPECIFICATION
RH1016
UltraFast™ Precision
10ns Comparator
PAD FUNCTION
1
1
2
7
1
1
8
DIE CROSS REFERENCE
LTC Finished
Part Number
RH1016M
RH1016M
*DWF = DICE in wafer form.
6
3
1.
2.
3.
4.
5.
6.
7.
8.
V
+
+IN
–IN
V
–
LATCH ENABLE
GND
Q OUT
Q OUT
Order
Part Number
RH1016 DICE
RH1016 DWF*
4
5
56mils
×
58mils
Backside Connection is V
–
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
DICE ELECTRICAL TEST LIMITS
+
–
SYMBOL
V
OS
I
OS
I
B
PARAMETER
Input Offset Voltage
Input Offset Current
Input Bias Current
Input Voltage Range
CMRR
PSRR
A
V
V
OH
V
OL
I
+
I
–
V
IH
V
IL
I
IL
Common Mode Rejection
Supply Voltage Rejection
Small-Signal Voltage Gain
Output High Voltage
Output Low Voltage
Positive Supply Current
Negative Supply Current
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
T
A
= 25°C. V = 5V, V = –5V, V
OUT(Q)
= 1.4V, V
LATCH
= 0V, unless otherwise specified.
CONDITIONS
R
S
≤ 100Ω (Note 1)
(Note 1)
(Note 2)
(Note 3)
Single 5V Supply (Note 3)
–3.75V ≤ V
CM
≤ 3.5V
Positive Supply 4.6V ≤ V
+
≤5.4V
Negative Supply –7V ≤ V
–
≤ –2V
1V ≤ V
OUT
≤ 2V
V
+
≥ 4.6V, I
OUT
= 1mA
I
OUT
= 10mA
I
SINK
= 4mA
–3.75
1.25
80
60
80
1400
2.80
2.60
0.5
35
5
2.0
0.8
V
LATCH
= 0V
500
Note 3:
Input voltage range is guaranteed in part by CMRR testing and
in part by design and characterization. See the LT1016 data sheet for
discussion of input voltage range for supplies other than ±5V or 5V.
MIN
MAX
±3
1
10
3.5
3.5
UNITS
mV
μA
μA
V
V
dB
dB
dB
V/V
V
V
V
mA
mA
V
V
μA
Note 1:
Input offset voltage is defined as the average of the two voltages
measured by forcing first one output, then the other to 1.4V. Input offset
current is defined in the same way.
Note 2:
Input bias current (I
B
) is defined as the average of the two input
currents.
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
1
DICE/DWF SPECIFICATION
RH1016
Rad Hard die require special handling as compared to standard IC chips.
Rad Hard die are susceptible to surface damage because there is no silicon
nitride passivation as on standard die. Silicon nitride protects the die
surface from scratches by its hard and dense properties. The passivation
on Rad Hard die is silicon dioxide that is much “softer” than silicon nitride.
LTC recommends that die handling be performed with extreme care so
as to protect the die surface from scratches. If the need arises to move
the die around from the chip tray, use a Teflon-tipped vacuum wand. This
wand can be made by pushing a small diameter Teflon tubing onto the tip
of a steel-tipped wand. The inside diameter of the Teflon tip should match
the die size for efficient pickup. The tip of the Teflon should be cut square
and flat to ensure good vacuum to die surface. Ensure the Teflon tip
remains clean from debris by inspecting under stereoscope.
During die attach, care must be exercised to ensure no tweezers touch the
top of the die.
Wafer level testing is performed per the indicated specifications for dice. Considerable differences in performance can often be observed for dice versus
packaged units due to the influences of packaging and assembly on certain devices and/or parameters. Please consult factory for more information
on dice performance and lot qualifications via lot sampling test procedures.
Dice data sheet subject to change. Please consult factory for current revision in production.
I.D.No. 66-13-1016
2
Linear Technology Corporation
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(408) 432-1900
●
FAX: (408) 434-0507
●
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