HD151TS305RP
Spread Spectrum Clock for EMI Solution
ADE-205-658C (Z)
Preliminary
Rev.3
Jun. 2002
Description
The HD151TS305 is a high-performance Spread Spectrum Clock modulator. It is suitable for low EMI
solution.
Features
•
Supports 40 MHz to 140 MHz operation. (Designed @ SSCCLKOUT = 48 MHz and 72 MHz)
•
1 copy of finx4 clock out with Spread Spectrum Modulation @3.3 V
•
1 copy of reference clock @3.3 V
•
Programmable Spread Spectrum Modulation (±0.25%, ±0.5%, ±1.5% Central Spread Modulation and
Spread Spectrum disable mode)
•
SOP-8pin
Key Specifications
•
Supply Voltages: VDD = 3.3 V ±0.165 V
•
0 to 70°C (Ta) Operating Range
•
50 ± 5% Outputs Clock Duty Cycle
•
Cycle to Cycle jitter = ±250ps typ.
HD151TS305RP
Block Diagram
VDD
GND
CLKOUT (12MHz typ.)
XIN
OSC
XOUT
R=1 MΩ
1/n
SSC Modulator
SEL0
1/m
Synthesizer
SSCCLKOUT (48MHz typ.)
R=100 kΩ
Mode Control
SEL1
R=100 kΩ
Pin Arrangement
SSCCLKOUT
1
8
SEL1
VDD
2
7
CLKOUT
GND
3
6
SEL0
XIN
4
5
XOUT
(Top view)
Rev.3, Jun. 2002, page 2 of 10
HD151TS305RP
SSC Function Table
SEL1 :0
00
01
10
11
Spread Percentage
±0.5%
±1.5%
SSC OFF
±0.25%
Note:
±0.25%
SSC is selected for default by internal pull-up & down resistors.
Clock Frequency Table
XIN(MHz)
10
35
SSCCLKOUT(MHz)
40
*1
*1
CLKOUT(MHz)
10
35
*2
*2
140
Notes: 1. With spread spectrum modulation.
2. Without spread spectrum modulation.
Pin Descriptions
Pin name
GND
VDD
CLKOUT
SSCCLKOUT
XIN
XOUT
SEL0
SEL1
No.
3
2
7
1
4
5
6
8
Type
Ground
Power
Output
Output
Input
Output
Input
Input
Description
GND pin
Power supplies pin. Normally 3.3 V.
Normally 3.3 V reference clock output.
Spread spectrum modulated clock output.
Oscillator input.
Oscillator output.
SSC mode select pin. LVCMOS level input.
Pull-up by internal resistor (100 kΩ).
SSC mode select pin. LVCMOS level input.
Pull–up by internal resistor (100 kΩ).
Rev.3, Jun. 2002, page 3 of 10
HD151TS305RP
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
Output voltage
*1
Symbol
VDD
V
I
V
O
I
IK
I
OK
I
O
Ratings
–0.5 to 4.6
–0.5 to 4.6
–0.5 to
VDD+0.5
–50
–50
±50
0.7
Unit
V
V
V
mA
mA
mA
W
°C
Conditions
Input clamp current
Output clamp current
Continuous output current
Maximum power dissipation
at Ta = 55°C (in still air)
Storage temperature
Notes:
V
I
< 0
V
O
< 0
V
O
= 0 to VDD
T
stg
–65 to +150
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage
to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute maximum rated conditions for extended periods may affect device
reliability.
1. The input and output negative voltage ratings may be exceeded if the input and output clamp
current ratings are observed.
Recommended Operating Conditions
Item
Supply voltage
DC input signal voltage
High level input voltage
Low level input voltage
Operating temperature
Input clock duty cycle
V
IH
V
IL
T
a
Symbol
VDD
Min
3.135
–0.3
2.0
–0.3
0
45
Typ
3.3
—
—
—
—
50
Max
3.465
VDD+0.3
VDD+0.3
0.8
70
55
Unit Conditions
V
V
V
V
°C
%
Rev.3, Jun. 2002, page 4 of 10
HD151TS305RP
DC Electrical Characteristics
Ta = 0 to 70°C, VDD = 3.3 V±5%
Item
Input low voltage
Input high voltage
Input current
Symbol
V
IL
V
IH
I
I
Min
—
2.0
—
—
Typ
—
—
—
—
*1
Max
0.8
—
±10
±100
Unit
V
V
µA
Test Conditions
V
I
= 0 V or 3.465 V,
VDD = 3.465 V, XIN pin
V
I
= 0 V or 3.465 V,
VDD = 3.465 V,
SEL0, SEL1 pins
Input slew rate
Input capacitance
Operating current
Note:
C
I
1
—
—
—
—
20
4
4
—
V / ns 20% – 80%
pF
mA
SEL0, SEL1
XIN = 24 MHz, C
L
= 0 pF,
VDD = 3.3 V
1. For conditions shown as Min or Max, use the appropriate value specified under recommended
operating conditions.
DC Electrical Characteristics / Clock Output & SSC Clock Output
Ta = 0 to 70°C, VDD = 3.3 V±5%
Item
Output voltage
Note:
Symbol Min
V
OH
V
OL
3.1
—
Typ
—
—
*1
Max
—
50
Unit
V
mV
Test Conditions
I
OH
= –1 mA, VDD = 3.3 V
I
OL
= 1 mA, VDD = 3.3 V
1. For conditions shown as Min or Max, use the appropriate value specified under recommended
operating conditions.
Rev.3, Jun. 2002, page 5 of 10
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