SuperH™ RISC Engine
SH7032 and SH7034
HD6417032, HD6477034,
HD6437034, HD6417034
HD6437034B, HD6417034B
Hardware Manual
ADE-602-062D
Rev. 5.0
9/25/01
Hitachi, Ltd.
Cautions
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patent, copyright, trademark, or other intellectual property rights for information contained in
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contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
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However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
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life support.
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particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
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consider normally foreseeable failure rates or failure modes in semiconductor devices and
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Preface
The SH7032 and SH7034 are microprocessors that integrate peripheral functions necessary for
system configuration with a 32-bit internal architecture SH1-DSP CPU as its core.
The SH7032 and SH7034's on-chip peripheral functions include an interrupt controller, timers,
serial communication interfaces, a user break controller (UBC), a bus state controller (BSC), a
direct memory access controller (DMAC), and I/O ports, making it ideal for use as a
microcomputer in electronic devices that require high speed together with low power
consumption.
Intended Readership: This manual is intended for users undertaking the design of an application
system using the SH7032 and SH7034. Readers using this manual require a
basic knowledge of electrical circuits, logic circuits, and microcomputers.
Purpose:
The purpose of this manual is to give users an understanding of the hardware
functions and electrical characteristics of the SH7032 and SH7034. Details
of execution instructions can be found in the SH-1, SH-2, SH-DSP
Programming Manual, which should be read in conjunction with the present
manual.
Using this Manual:
•
For an overall understanding of the SH7032 and SH7034's functions
Follow the Table of Contents. This manual is broadly divided into sections on the CPU, system
control functions, peripheral functions, and electrical characteristics.
•
For a detailed understanding of CPU functions
Refer to the separate publication SH-1, SH-2, SH-DSP Programming Manual.
Note on bit notation: Bits are shown in high-to-low order from left to right.
Related Material:
The latest information is available at our Web Site. Please make sure that you
have the most up-to-date information available.
http://www.hitachisemiconductor.com/
User's Manuals on the SH7032 and SH7034:
Manual Title
SH7032 and SH7034 Hardware Manual
SH-1, SH-2, SH-DSP Programming Manual
ADE No.
This manual
ADE-602-085
Users manuals for development tools:
Manual Title
C/C++ Complier, Assembler, Optimized Linkage Editor User's Manual
Simulator Debugger Users Manual
Hitachi Embedded Workshop Users Manual
ADE No.
ADE-702-304
ADE-702-266
ADE-702-275
Application Note:
Manual Title
C/C++ Complier
ADE No.
ADE-502-046
Organization of This Manual
Table 1 describes how this manual is organized. Figure 1 shows the relationships between the
sections within this manual.
Table 1
Category
Overview
CPU
Manual Organization
Section Title
1.
2.
Overview
CPU
Abbrevi-
ation
—
CPU
Contents
Features, internal block diagram, pin
layout, pin functions
Register configuration, data structure.
instruction features, instruction types,
instruction lists
MCU mode, PROM mode
Resets, address errors, interrupts, trap
instructions, illegal instructions
NMI interrupts, user break interrupts, IRQ
interrupts, on-chip module interrupts
Break address and break bus cycle
selection
Crystal pulse generator, duty correction
circuit
Division of memory space, DRAM
interface, refresh, wait state control, parity
control
Auto request, external request, on-chip
peripheral module request, cycle steal
mode, burst mode
Waveform output mode, input capture
function, counter clear function, buffer
operation, PWM mode, complementary
PWM mode, reset synchronized mode,
synchronized operation, phase counting
mode, compare match output mode
Compare match output triggers, non-
overlap operation
Watchdog timer mode, interval timer mode
Asynchronous mode, synchronous mode,
multiprocessor communication function
Single mode, scan mode, activation by
external trigger
Operating
Modes
Internal
Modules
3.
4.
5.
6.
Operating Modes —
Exception
Handling
Interrupt
Controller
User Break
Controller
Clock Pulse
Generator
Bus State
Controller
Direct Memory
Access
Controller
16-Bit Integrated
Timer Pulse Unit
—
INTC
UBC
CPG
BSC
Clock
Buses
7.
8.
9.
DMAC
Timers
10.
ITU
11.
Programmable
Timing Pattern
Controller
Watchdog Timer
Serial
Communication
Interface
A/D Converter
TPC
12.
Data
Processing
13.
WDT
SCI
14.
A/D
FPGA/CPLD
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