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IDT74FCT646ATQG8

产品描述Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24
产品类别逻辑    逻辑   
文件大小103KB,共8页
制造商IDT (Integrated Device Technology)
标准  
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IDT74FCT646ATQG8概述

Registered Bus Transceiver, FCT Series, 1-Func, 8-Bit, True Output, CMOS, PDSO24, QSOP-24

IDT74FCT646ATQG8规格参数

参数名称属性值
是否无铅不含铅
是否Rohs认证符合
零件包装代码SOIC
包装说明QSOP-24
针数24
Reach Compliance Codecompliant
其他特性DIRECTION CONTROL; SELECT INPUT FOR MULTIPLEXED TRANSMISSION OF REGISTERED OR REAL TIME DATA
系列FCT
JESD-30 代码R-PDSO-G24
JESD-609代码e3
长度8.65 mm
负载电容(CL)50 pF
逻辑集成电路类型REGISTERED BUS TRANSCEIVER
位数8
功能数量1
端口数量2
端子数量24
最高工作温度85 °C
最低工作温度-40 °C
输出特性3-STATE
输出极性TRUE
封装主体材料PLASTIC/EPOXY
封装代码SSOP
封装形状RECTANGULAR
封装形式SMALL OUTLINE, SHRINK PITCH
峰值回流温度(摄氏度)260
传播延迟(tpd)6.3 ns
认证状态Not Qualified
座面最大高度1.75 mm
最大供电电压 (Vsup)5.25 V
最小供电电压 (Vsup)4.75 V
标称供电电压 (Vsup)5 V
表面贴装YES
技术CMOS
温度等级INDUSTRIAL
端子面层MATTE TIN
端子形式GULL WING
端子节距0.635 mm
端子位置DUAL
处于峰值回流温度下的最长时间40
宽度3.9116 mm
Base Number Matches1

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IDT54/74FCT646T/AT/CT
FAST CMOS OCTAL TRANSCEIVER/REGISTER (3-STATE)
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
FAST CMOS OCTAL
TRANSCEIVER/
REGISTER (3-STATE)
FEATURES:
IDT54/74FCT646T/AT/CT
DESCRIPTION:
Std., A, and C grades
Low input and output leakage
1µA (max.)
CMOS power levels
True TTL input and output compatibility:
– V
OH
= 3.3V (typ.)
– V
OL
= 0.3V (typ.)
High Drive outputs (-15mA I
OH
, 64mA I
OL
)
Meets or exceeds JEDEC standard 18 specifications
Military product compliant to MIL-STD-883, Class B and DESC
listed (dual marked)
Power off disable outputs permit "live insertion"
Available in the following packages:
– Industrial: SOIC, SSOP, QSOP, TSSOP
– Military: CERDIP, LCC
The FCT646T consists of a bus transceiver with 3-state D-type flip-flops
and control circuitry arranged for multiplexed transmission of data directly
from the data bus or from the internal storage registers. The FCT646T
utilizes the enable control (G) and direction (DIR) pins to control the
transceiver functions.
SAB and SBA control pins are provided to select either real- time or stored
data transfer. The circuitry used for select control will eliminate the typical
decoding glitch that occurs in a multiplexer during the transition between
stored and real-time data. A low input level selects real-time data and a high
selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D flip-
flops by low-to-high transitions at the appropriate clock pins (CPAB or
CPBA), regardless of the select or enable control pins.
FUNCTIONAL BLOCK DIAGRAM
G
DIR
CPB A
SBA
CPA B
SAB
B REG
ONE OF EIGHT CHANNELS
1D
C1
A1
A REG
1D
C1
B1
TO SEVE N OTHER CHANN ELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND INDUSTRIAL TEMPERATURE RANGES
1
JUNE 2002
DSC-5505/3
© 2002 Integrated Device Technology, Inc.

 
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