D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
MM74C221 Dual Monostable Multivibrator
November 1987
Revised May 2002
MM74C221
Dual Monostable Multivibrator
General Description
The MM74C221 dual monostable multivibrator is a mono-
lithic complementary MOS integrated circuit. Each multivi-
brator features a negative-transition-triggered input and a
positive-transition-triggered input, either of which can be
used as an inhibit input, and a clear input.
Once fired, the output pulses are independent of further
transitions of the A and B inputs and are a function of the
external timing components C
EXT
and R
EXT
. The pulse
width is stable over a wide range of temperature and V
CC
.
Pulse stability will be limited by the accuracy of external
timing components. The pulse width is approximately
defined by the relationship t
W(OUT)
≈
C
EXT
R
EXT
. For fur-
ther information and applications, see AN-138.
Features
s
Wide supply voltage range:
4.5V to 15V
s
Guaranteed noise margin: 1.0V
s
High noise immunity: 0.45 V
CC
(typ.)
s
Low power TTL compatibility: fan out of 2 driving 74L
Ordering Code:
Order Number
74MMC221N
Package Number
N16E
Package Description
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Connection Diagrams
Timing Component
Truth Table
Inputs
Clear
L
X
X
H
H
A
X
H
X
L
B
X
X
L
Outputs
Q
L
L
Q
H
H
↑
H
↓
H
=
HIGH Level
L
=
LOW Level
X= Irrelevant
↑ =
Transition from LOW-to-HIGH
↓ =
Transition from HIGH-to-LOW
=
One HIGH Level Pulse
=
One LOW Level Pulse
L
H
Top View
© 2002 Fairchild Semiconductor Corporation
DS005904
www.fairchildsemi.com
MM74C221
Absolute Maximum Ratings
(Note 1)
Voltage at Any Pin
Operating Temperature Range
Storage Temperature Range
Power Dissipation
Dual-In-Line
Small Outline
Operating V
CC
Range
Absolute Maximum V
CC
R
EXT
≥
80 V
CC
(
Ω
)
Lead Temperature
(Soldering, 10 seconds)
260
°
C
700 mW
500 mW
4.5V to 15V
18V
Note 1:
“Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristics table provides conditions
for actual device operation.
−
0.3V to V
CC
+
0.3V
−
55
°
C to
+
125
°
C
−
65
°
C to
+
150
°
C
DC Electrical Characteristics
Max/min limits apply across temperature range, unless otherwise noted
Symbol
Parameter
Conditions
CMOS to CMOS
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
IN(1)
I
IN(0)
I
CC
I
CC
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
Logical “1” Input Current
Logical “0” Input Current
Supply Current (Standby)
Supply Current
(During Output Pulse)
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V, I
O
= −10 µA
V
CC
=
10V, I
O
= −10 µA
V
CC
=
5V, I
O
= +10 µA
V
CC
=
10V, I
O
= +10 µA
V
CC
=
15V, V
IN
=
15V
V
CC
=
15V, V
IN
=
0V
V
CC
=
15V, R
EXT
= ∞,
Q1, Q2
=
Logic “0” (Note 2)
V
CC
=
15V, Q1
=
Logic “1”,
Q2
=
Logic “0” (Figure 4)
V
CC
=
5V, Q1
=
Logic “1”,
Q2
=
Logic “0” (Figure 4)
Leakage Current at R/C
EXT
Pin
CMOS/LPTTL Interface
V
IN(1)
V
IN(0)
V
OUT(1)
V
OUT(0)
I
SOURCE
I
SOURCE
I
SINK
I
SINK
Logical “1” Input Voltage
Logical “0” Input Voltage
Logical “1” Output Voltage
Logical “0” Output Voltage
Output Source Current
(P-Channel)
Output Source Current
(P-Channel)
Output Sink Current
(N-Channel)
Output Sink Current
(N-Channel)
V
CC
=
4.75V
V
CC
=
4.75V
V
CC
=
4.75V, I
O
= −360 µA
V
CC
=
4.75V, I
O
=
360
µA
V
CC
=
5V
T
A
=
25°C, V
OUT
=
0V
V
CC
=
10V
T
A
=
25°C, V
OUT
=
0V
V
CC
=
5V
T
A
=
25°C, V
OUT
=
V
CC
V
CC
=
10V
T
A
=
25°C, V
OUT
=
V
CC
8
mA
1.75
mA
−8
mA
−1.75
2.4
0.4
V
CC
−
1.5
0.8
V
V
V
V
mA
V
CC
=
15V, V
CEXT
=
5V
0.01
3.0
µA
2
mA
15
mA
−1.0
0.005
−0.005
0.05
300
4.5
9.0
0.5
1
1.0
3.5
8.0
1.5
2.0
V
V
V
V
µA
µA
µA
Min
Typ
Max
Units
Output Drive (See Family Characteristics Data Sheet) (Short Circuit Current)
Note 2:
In Standby (Q
=
Logic “0”) the power dissipated equals the leakage current plus V
CC
/R
EXT
.
www.fairchildsemi.com
2
MM74C221
AC Electrical Characteristics
T
A
=
25
°
C, C
L
=
50 pF, unless otherwise noted
Symbol
t
pd A, B
t
pd CL
t
S
t
W(A, B)
t
W(CL)
Parameter
Propagation Delay from Trigger
Input (A, B) to Output Q, Q
Propagation Delay from Clear
Input (CL) to Output Q, Q
Time Prior to Trigger Input (A, B)
that Clear must be Set
Trigger Input (A, B) Pulse Width
Clear Input (CL) Pulse Width
(Note 3)
Conditions
Min
Typ
250
120
250
120
150
60
150
70
150
70
50
20
50
30
50
30
900
350
320
9.0
9.0
8.9
900
900
900
10.6
10
9.8
1020
1000
990
50
25
16.7
12.2
11
10.8
1200
1100
1100
150
65
45
90
90
15
5
25
%
Ω
Max
500
250
500
250
Units
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
µs
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V
V
CC
=
10V
V
CC
=
5V, R
EXT
=
10k,
C
EXT
=
0 pF
V
CC
=
10V, R
EXT
=
10k,
C
EXT
=
0 pF
V
CC
=
15V, R
EXT
=
10k,
C
EXT
=
0 pF
V
CC
=
5V, R
EXT
=
10k,
C
EXT
=
1000 pF (Figure 1)
V
CC
=
10V, R
EXT
=
10k,
C
EXT
=
1000 pF (Figure 1)
V
CC
=
15V, R
EXT
=
10k,
C
EXT
=
1000 pF (Figure 1)
V
CC
=
5V, R
EXT
=
10k,
C
EXT
=
0.1
µF
(Figure 3)
V
CC
=
10V, R
EXT
=
10k,
C
EXT
=
0.1
µF
(Figure 3)
V
CC
=
15V, R
EXT
=
10k,
C
EXT
=
0.1
µF
(Figure 3)
t
W(OUT)
Q or Q Output Pulse Width
R
ON
ON Resistance of Transistor
between R/C
EXT
to C
EXT
Output Duty Cycle
V
CC
=
5V (Note 4)
V
CC
=
10V (Note 4)
V
CC
=
15V (Note 4)
R
=
10k, C
=
1000 pF
R
=
10k, C
=
0.1
µF
(Note 5)
C
IN
Input Capacitance
R/C
EXT
Input (Note 6)
Any Other Input (Note 6)
pF
Note 3:
AC Parameters are guaranteed by DC correlated testing.
Note 4:
See AN-138 for detailed explanation R
ON
.
Note 5:
Maximum output duty cycle
=
R
EXT
/R
EXT
+
1000.
Note 6:
Capacitance is guaranteed by periodic testing.
3
www.fairchildsemi.com
MM74C221
Typical Performance Characteristics
0% Point pulse width:
At V
CC
=
5V,
T
W
=
10.6
µs
At V
CC
=
10V,T
W
=
10
µs
At V
CC
=
15V,T
W
=
9.8
µs
Percentage of units within
+4%:
At V
CC
=
5V,90% of units
At V
CC
=
10V,95% of units
At V
CC
=
15V,98% of units
0% Point pulse width:
At V
CC
=
5V,
T
W
=
1020
µs
At V
CC
=
10V,T
W
=
1000
µs
At V
CC
=
15V,T
W
=
982
µs
Percentage of units within
+4%:
At V
CC
=
5V,95% of units
At V
CC
=
10V,97% of units
At V
CC
=
15V,98% of units
FIGURE 1. Typical Distribution of Units for Output
Pulse Width
FIGURE 3. Typical Distribution of Units for Output
Pulse Width
FIGURE 2. Typical Variation in Output Pulse Width vs
Temperature
FIGURE 4. Typical Power Dissipation per Package
www.fairchildsemi.com
4
DSP 与 ARM 处理器
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
