19-4371; Rev 0; 11/08
IT
TION K
VALUA
E
BLE
AVAILA
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
General Description
Features
♦
On-Chip 4Kb EEPROM for Storing LDMOS Bias
Characteristics
♦
Integrated High-Side Current-Sense PGA with
Gain of 2, 10, or 25
♦
±0.75% Accuracy for Sense Voltage Between
+75mV and +1250mV
♦
Full-Scale Sense Voltage
+100mV with a Gain of 25
+250mV with a Gain of 10
+1250mV with a Gain of 2
♦
Common-Mode Range, LDMOS Drain Voltage:
+5V to +32V
♦
Adjustable Low-Noise 0 to AV
DD
Output Gate
Bias Voltage Range
♦
Fast Clamp to AGND for LDMOS Protection
♦
12-Bit DAC Control of Gate with Temperature
♦
Internal Die Temperature Measurement
♦
2-Channel External Temperature Measurement
through Remote Diodes
♦
Internal 12-Bit ADC Measurement for
Temperature, Current, and Voltage Monitoring
♦
User-Selectable Serial Interface
400kHz/1.7MHz/3.4MHz I
2
C-Compatible Interface
16MHz SPI-/MICROWIRE-Compatible Interface
MAX11008
The MAX11008 controller biases RF LDMOS power
devices found in cellular base stations and other wire-
less infrastructure equipment. Each controller includes
a high-side current-sense amplifier with programmable
gains of 2, 10, and 25 to monitor the LDMOS drain cur-
rent over a range of 20mA to 5A. The MAX11008 sup-
ports up to two external diode-connected transistors to
monitor the LDMOS temperatures while an internal tem-
perature sensor measures the local die temperature. A
12-bit successive-approximation register (SAR) analog-
to-digital converter (ADC) converts the analog signals
from the programmable-gain amplifiers (PGAs), exter-
nal temperature sensors, internal temperature measure-
ment, and two additional auxiliary inputs. The
MAX11008 automatically adjusts the LDMOS bias volt-
ages by applying temperature, AIN, and/or drain cur-
rent samples to data stored in lookup tables (LUTs).
The MAX11008 includes two gate-drive channels, each
consisting of a 12-bit DAC to generate the positive gate
voltage for biasing the LDMOS devices. Each gate-
drive output supplies up to ±2mA of gate current. The
gate-drive amplifier is current-limited to ±25mA and
features a fast clamp to AGND.
The MAX11008 contains 4Kb of on-chip, nonvolatile
EEPROM organized as 256 bits x 16 bits to store LUTs
and register information. The device operates from
either a 4-wire 16MHz SPI™-/MICROWIRE™-compati-
ble or an I
2
C-compatible serial interface.
The MAX11008 operates from a +4.75V to +5.25V ana-
log supply with a typical supply current of 2mA, and a
+2.7V to +5.25V digital supply with a typical supply of
3mA. The device is packaged in a 48-pin, 7mm x 7mm,
thin QFN package and operates over the extended
(-40°C to +85°C) temperature range.
Applications
Cellular Base Stations
Microwave Radio Links
Feed-Forward Power Amps
Transmitters
Industrial Process Control
PART
MAX11008BETM+
Ordering Information
PIN-PACKAGE
48 TQFN-EP*
TEMP
ERROR (°C)
±3
+Denotes
a lead-free/RoHS-compliant package.
*EP
= Exposed pad.
Note:
The device is specified over the -40°C to +85°C operating
temperature range.
SPI is a trademark of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
MAX11008
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND .........................................................-0.3V to +6V
DV
DD
to DGND.........................................................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
CS_+, CS_- to AGND .............................................-0.3V to +34V
CS_+ to CS_-
If CS_+ > 6V .........................................................-0.3V to +6V
If CS_+
≤
6V .......................................................-0.3V to V
CS_-
Analog Inputs/Outputs to AGND ..................................................
...........................-0.3V to the lower of (AV
DD
+ 0.3V) and +6V
Digital Inputs/Outputs to DGND
(except SDA/DIN and SCL/SCLK)............................................
............................-0.3V to the lower of (DV
DD
+ 0.3V) and +6V
SDA/DIN and SCL/SCLK to DGND ..........................-0.3V to +6V
Continuous Input Current (all terminals)...........................±50mA
Continuous Power Dissipation (T
A
= +70°C)
48-Pin, 7mm x 7mm, TQFN (derate 27.8mW/°C above
+70°C).....................................................................2222.2mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CS_+
= +32V, AV
DD
= DV
DD
= +5V ±5%, external V
REFADC
= +2.5V, external V
REFDAC
= +2.5V, C
REF
= 0.1µF, C
GATE_
= 0.1nF,
V
SENSE
= V
CS_+
- V
CS_-
, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Common-Mode Input Voltage
Range
Common-Mode Rejection Ratio
CS_+ Input Bias Current
CS_- Input Bias Current
SYMBOL
V
CS1+
,
V
CS2+
CMRR
I
CS
_+
I
CS
_-
5V < V
CS_+
< 32V
V
SENSE
< 100mV over the common-mode
range
V
SENSE
< 100mV over the common-mode
range
Gain = 25
Full-Scale Sense Voltage Range
V
SENSE
Gain = 10
Gain = 2
Gain = 25
Minimum Sense Voltage Range
for ±0.75% V
SENSE
Accuracy
Minimum Sense Voltage Range
for ±2.5% V
SENSE
Accuracy
Total PGAOUT Voltage Error
PGAOUT Capacitive Load
PGAOUT Settling Time
Saturation Recovery Time
C
PGAOUT
t
HSCS
(Note 1)
Settles to within ±0.5% accuracy from
V
SENSE
= 3 x full scale
< 25
< 45
Gain = 10
Gain = 2
Gain = 25
Gain = 10
Gain = 2
V
SENSE
= 75mV
0
0
0
75
75
75
20
20
20
±0.1
CONDITIONS
MIN
TYP
MAX
UNITS
HIGH-SIDE CURRENT-SENSE PGA
5
110
135
195
±1
100
250
1250
100
250
1250
100
250
1250
±0.75
50
%
pF
µs
µs
mV
mV
mV
32
V
dB
µA
µA
2
_______________________________________________________________________________________
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
ELECTRICAL CHARACTERISTICS (continued)
(V
CS_+
= +32V, AV
DD
= DV
DD
= +5V ±5%, external V
REFADC
= +2.5V, external V
REFDAC
= +2.5V, C
REF
= 0.1µF, C
GATE_
= 0.1nF,
V
SENSE
= V
CS_+
- V
CS_-
, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
LDMOS GATE DRIVER (Gain = 2)
I
GATE
_ = ±0.1mA
Output Gate-Drive Voltage Range
V
GATE
_
I
GATE
_ = ±2mA
Output Impedance
GATE_ Settling Time
Output Capacitive Load
GATE_ Noise
Maximum Power-On Transient
Output Short-Circuit Current Limit
Total Unadjusted Error
Total Unadjusted Error without
Offset
Drift
Clamp to Zero Delay
Output-Safe Switch On-
Resistance
MONITOR ADC (DC characteristics)
Resolution
Differential Nonlinearity
Integral Nonlinearity
Offset Error
Gain Error
Gain Temperature Coefficient
Offset Temperature Coefficient
MONITOR ADC DYNAMIC CHARACTERISTICS (1kHz sine-wave input, 2.5V
P-P
, up to 94.4ksps)
Signal-to-Noise Plus Distortion
Total Harmonic Distortion
Spurious-Free Dynamic Range
Intermodulation Distortion
Full-Power Bandwidth
Full-Linear Bandwidth
SINAD
THD
SFDR
IMD
f
IN1
= 0.99kHz, f
IN2
= 1.02kHz
-3dB
SINAD > 68dB
Up to 5th harmonic
70
-82
86
76
1
100
dB
dBc
dBc
dBc
MHz
kHz
(Note 6)
N
ADC
DNL
ADC
INL
ADC
±2
±2
±0.4
±0.4
(Note 5)
12
-2
+2
±2
±4
±4
Bits
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
R
OPSW
I
SC
TUE
1s, sinking or sourcing
Worst case at CODE = 4063, use
external reference (Note 2)
R
GATE
_
t
GATE
_
C
GATE
_
Measured at DC
R
S
= 500Ω, C
GATE
_ = 15µF, V
GATE
_ =
0.5V to 4.5V (Note 1)
R
SERIES
= 0Ω
R
SERIES
= 500Ω
1kHz to 1MHz
0
0
15,000
1000
±100
±25
±7
±25
0.75
0.1
45
0.5
0.1
AV
DD
-
0.1
V
AV
DD
-
0.75
Ω
ms
nF
µV
P-P
mV
mA
mV
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX11008
CalCODE = 2457, MaxCODE = 2867,
TUE
NO_OFFSET
use external reference, T
A
= +25°C
(Note 2)
Gain = 2, MaxCODE = 2867 (Note 2)
C
GATE
_ = 0.5nF (Note 3)
V
GATE
_ clamped to AGND (Note 4)
±15
1
300
±8
mV
µV/°C
µs
Ω
_______________________________________________________________________________________
3
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
MAX11008
ELECTRICAL CHARACTERISTICS (continued)
(V
CS_+
= +32V, AV
DD
= DV
DD
= +5V ±5%, external V
REFADC
= +2.5V, external V
REFDAC
= +2.5V, C
REF
= 0.1µF, C
GATE_
= 0.1nF,
V
SENSE
= V
CS_+
- V
CS_-
, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Power-Up Time (External
Reference)
Power-Up Time (Internal
Reference)
Acquisition Time
Conversion Time
Aperture Delay
Input Voltage Range
Input Leakage Current
Input Capacitance
TEMPERATURE MEASUREMENTS
Internal Sensor Measurement
Error
External Sensor Measurement
Error (Note 9)
Relative Temperature Accuracy
Temperature Resolution
External Diode Drive Current (Low)
External Diode Drive Current (High)
INTERNAL REFERENCE
REFADC/REFDAC Output
Voltage
REFADC/REFDAC Temperature
Coefficient
REFADC/REFDAC Output
Impedance
Capacitive Bypass at
REFADC/REFDAC
Power-Supply Rejection Ratio
EXTERNAL REFERENCE
REFADC Input Voltage Range
REFADC Input Current
REFDAC Input Voltage Range
REFDAC Input Current
V
REFADC
I
REFADC
V
REFDAC
Static current when the DAC is not calibrated
V
REFADC
= 2.5V, f
SAMPLE
= 100ksps
Acquisition/between conversions
0.7
0.1
1.0
60
±0.01
2.5
AV
DD
80
V
µA
V
µA
PSRR
AV
DD
= 5V ± 5%
270
64
V
REFADC
,
V
REFDAC
TC
REFADC
,
TC
REFDAC
T
A
= +25°C
2.49
2.50
±15
6.5
2.51
V
ppm/°C
kΩ
pF
dB
3.25
T
A
= +25°C
T
A
= T
MIN
to T
MAX
(Note 8)
T
A
= +25°C
T
A
= T
MIN
to T
MAX
T
A
= T
MIN
to T
MAX
(Note 9)
±0.25
±1.5
±1
±3
±0.4
1/8
4
68
75
±3
°C
°C
°C
°C/LSB
µA
µA
C
ADCIN
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MONITOR ADC CONVERSION RATE
t
PUEXT
t
PUINT
t
ACQ
t
CONV
t
AD
V
ADCIN
Relative to AGND (Note 7)
V
IN
= 0 and V
IN
= VAV
DD
0
±0.01
34
Internally clocked, T
A
= +25°C
20
V
REFADC
1.1
70
0.5
10
µs
µs
µs
µs
ns
V
µA
pF
MONITOR ADC ANALOG INPUT (ADCIN1, ADCIN2)
4
_______________________________________________________________________________________
Dual RF LDMOS Bias Controller with
Nonvolatile Memory
ELECTRICAL CHARACTERISTICS (continued)
(V
CS_+
= +32V, AV
DD
= DV
DD
= +5V ±5%, external V
REFADC
= +2.5V, external V
REFDAC
= +2.5V, C
REF
= 0.1µF, C
GATE_
= 0.1nF,
V
SENSE
= V
CS_+
- V
CS_-
, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
Resolution
Integral Nonlinearity
SYMBOL
N
DAC
INL
DAC
Measured at GATE_
CONDITIONS
MIN
12
±2
±4
±1
TYP
MAX
UNITS
Bits
LSB
LSB
MAX11008
GATE-DRIVER DAC DC ACCURACY
Differential Nonlinearity
DNL
DAC
Guaranteed monotonic (Note 10)
DIGITAL INPUTS (SCL/SCLK, SDA/DIN, A0/CS, A1/DOUT, A2/N.C.,
CNVST,
OPSAFE1, OPSAFE2)
SDA/DIN and SCL/SCLK only
Input High Voltage
V
IH
A0/CS, A1/DOUT, A2/N.C.,
CNVST,
OPSAFE1, OPSAFE2 only
SDA/DIN and SCL/SCLK only
Input Low Voltage
V
IL
A0/CS, A1/DOUT, A2/N.C.,
CNVST,
OPSAFE1, OPSAFE2 only
SDA/DIN and SCL/SCLK only
Digital inputs at 0 or V
DVDD
C
IN
DV
DD
- 0.4V
0.08 x
DV
DD
±0.1
5
0.7 x
DV
DD
2.3
V
0.3 x
DV
DD
0.7
V
Input Hysteresis
Input Leakage Current
Input Capacitance
V
HYS
V
±1
µA
pF
DIGITAL OUTPUTS (SDA/DIN, ALARM, BUSY, DOUT)
Output High Voltage
V
OH
ALARM and BUSY only, I
SOURCE
= 0.2mA
SDA/DIN and A1/DOUT, I
SINK
= 3mA,
(Note 11)
ALARM and BUSY only, I
SINK
= 0.3mA
Three-State Leakage
Three-State Capacitance
POWER SUPPLIES (Note 12)
Analog Supply Voltage Range
Digital Supply Voltage Range
Analog Supply Current
Digital Supply Current
AV
DD
DV
DD
I
AVDD
I
DVDD
AV
DD
= 5V
Shutdown (Note 13)
DV
DD
= 5V
Shutdown
4.75
2.7
2
0.4
3
2
5.25
AV
DD
+ 0.3
4
2
6
32
V
V
mA
µA
mA
µA
I
IL
Digital inputs at 0 or DV
DD
±0.1
5
V
0.4
0.3
±1
µA
pF
Output Low Voltage
V
OL
V
_______________________________________________________________________________________
5
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