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1.
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“Standard”:
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
(Note 1) “Renesas Electronics” as used in this document means Renesas Electronics Corporation and also includes its majority-
owned subsidiaries.
(Note 2) “Renesas Electronics product(s)” means any product developed or manufactured by or for Renesas Electronics.
DATA SHEET (PRELIMINARY)
µ
PD780031, 780032, 780033, 780034
8-BIT SINGLE-CHIP MICROCONTROLLERS
MOS INTEGRATED CIRCUIT
DESCRIPTION
The
µ
PD780031, 780032, 780033, and 780034 are members of the
µ
PD780034 Subseries of the 78K/0 Series.
They provide only selected functions of the existing
µ
PD78054 Subseries, and feature an enhanced serial interface
as well as an on-chip 10-bit resolution A/D converter.
A flash memory version, the
µ
PD78F0034, ROM version and various development tools are available.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µ
PD780024, 780034, 780024Y, 780034Y Subseries User's Manual: U12022E
78K/0 Series User’s Manual – Instructions
: U12326E
FEATURES
• Internal ROM and RAM
Item
Part Number
Program Memory
(Internal ROM)
8 Kbytes
16 Kbytes
24 Kbytes
32 Kbytes
1024 bytes
Data Memory
(Internal High-Speed RAM)
512 bytes
Package
µ
PD780031
µ
PD780032
µ
PD780033
µ
PD780034
• 64-pin plastic shrink DIP (750 mil)
• 64-pin plastic QFP (14
×
14 mm)
• 64-pin plastic LQFP (12
×
12 mm)
• External memory expansion space: 64 Kbytes
• Minimum instruction execution time: 0.24
µ
s (at f
X
= 8.38-MHz operation)
• I/O ports: 51 (N-ch open-drain 5-V withstand voltage: 4)
• 10-bit resolution A/D converter: 8 channels (AV
DD
= 2.7 to 5.5 V)
• Serial interface: 3 channels
• Timer: 5 channels
• Power supply voltage: V
DD
= 1.8 to 5.5 V
APPLICATIONS
Telephones, home electric appliances, pagers, AV equipment, car audios, office automation equipment, etc.
The information in this document is subject to change without notice.
Document No. U12300EJ1V0DS00 (1st edition)
Date Published November 1997 N
Printed in Japan
The mark
shows major revised points.
©
1997
1997
µ
PD780031, 780032, 780033, 780034
78K/0 SERIES PRODUCT DEVELOPMENT
These products are a further development in the 78K/0 Series. The designations appearing inside the boxes are
subseries names.
Products in mass production
Products under development
Y subseries products are compatible with I
2
C bus.
Control
100-pin
100-pin
100-pin
100-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
µ
PD78075B
µ
PD78078
µ
PD78070A
µ
PD780058
µ
PD78058F
µ
PD78054
µ
PD780034
µ
PD780024
µ
PD78014H
µ
PD78018F
µ
PD78014
µ
PD780001
µ
PD78002
µ
PD78083
Inverter control
µ
PD780988
EMI noise reduced version of the
µ
PD78078
µ
PD78078Y
µ
PD78070AY
µ
PD780018AY
µ
PD780058Y
Note
µ
PD78058FY
µ
PD78054Y
µ
PD780034Y
µ
PD780024Y
µ
PD78018FY
µ
PD78014Y
µ
PD78002Y
A timer was added to the
µ
PD78054, and external interface function was enhanced
ROM-less versions of the
µ
PD78078
Serial I/O of the
µ
PD78078Y was enhanced, and only selected functions are provided
Serial I/O of the
µ
PD78054 was enhanced, EMI noise reduced version
EMI noise reduced version of the
µ
PD78054
UART and D/A converter were added to the
µ
PD78014, and I/O was enhanced
An A/D converter of the
µ
PD780024 was enhanced
Serial I/O of the
µ
PD78018F was enhanced
EMI noise reduced version of the
µ
PD78018F
Low-voltage (1.8 V) operation versions of the
µ
PD78014 with several ROM and RAM capacities available
An A/D converter and 16-bit timer were added to the
µ
PD78002
An A/D converter was added to the
µ
PD78002
Basic subseries for control
On-chip UART, capable of operating at a low voltage (1.8 V)
64-pin
64-pin
64-pin
Inverter control, timer and SIO of the
µ
PD780964 were enhanced, and ROM and RAM
capacities were expanded.
An A/D converter of the
µ
PD780924 was enhanced
On-chip inverter control circuit and UART, EMI noise reduced version
µ
PD780964
µ
PD780924
78K/0
Series
FIP
TM
drive
100-pin
100-pin
80-pin
80-pin
µ
PD780208
µ
PD780228
µ
PD78044H
µ
PD78044F
The I/O and FIP C/D of the
µ
PD78044F were enhanced, Display output total: 53
The I/O and FIP C/D of the
µ
PD78044H were enhanced, Display output total: 48
N-ch open-drain input/output was added to the
µ
PD78044F, Display output total: 34
Basic subseries for driving FIP, Display output total: 34
LCD drive
100-pin
100-pin
100-pin
µ
PD780308
µ
PD78064B
µ
PD78064
µ
PD780308Y
µ
PD78064Y
SIO of the
µ
PD78064 was enhanced, and ROM and RAM capacities were expanded
EMI noise reduced version of the
µ
PD78064
Basic subseries for driving LCDs, On-chip UART
IEBus
TM
supported
80-pin
80-pin
µ
PD78098B
µ
PD78098
EMI noise reduced version of the
µ
PD78098
An IEBus controller was added to the
µ
PD78054
Meter control
80-pin
µ
PD780973
On-chip automobile meter drive controller/driver
Note
Under planning
Preliminary Data Sheet
3
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