serial interface. This ADC includes an internal reference
and a fully differential sample-and-hold circuit to reduce
common mode noise. The LTC2309 operates from an
internal clock to achieve a fast 1.3μs conversion time.
The LTC2309 operates from a single 5V supply and
draws just 300μA at a throughput rate of 1ksps. The
ADC enters nap mode when not converting, reducing
the power dissipation.
The LTC2309 is available in a small 24-pin 4mm
×
4mm
QFN package. The internal 2.5V reference and 8-channel
multiplexer further reduce PCB board space require-
ments.
The low power consumption and small size make the
LTC2309 ideal for battery-operated and portable applica-
tions, while the 2-wire I
2
C compatible serial interface makes
this ADC a good match for space-constrained systems.
L,
LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
12-Bit Resolution
Low Power: 1.5mW at 1ksps, 35μW Sleep Mode
14ksps Throughput Rate
Low Noise: SNR = 73.4dB
Guaranteed No Missing Codes
Single 5V Supply
2-wire I
2
C Compatible Serial Interface with Nine
Addresses Plus One Global for Synchronization
Fast Conversion Time: 1.3μs
Internal Reference
Internal 8-Channel Multiplexer
Internal Conversion Clock
Unipolar or Bipolar Input Ranges (Software Selectable)
24-Pin 4mm
×
4mm QFN Package
APPLICATIONS
n
n
n
n
n
n
Industrial Process Control
Motor Control
Accelerometer Measurements
Battery-Operated Instruments
Isolated and/or Remote Data Acquisition
Power Supply Monitoring
BLOCK DIAGRAM
5V
10μF
0.1μF
0.1μF
10μF
Integral Nonlinearity
vs Output Code
AD1
AD0
1.00
0.75
0.50
INL (LSB)
V
REF
CH0
CH1
CH2
ANALOG INPUTS
0V TO 4.096V UNIPOLAR CH4
±2.048V BIPOLAR
CH5
CH6
CH7
COM
CH3
ANALOG
INPUT
MUX
AV
DD
DV
DD
LTC2309
+
–
12-BIT
SAR ADC
I
2
C
PORT
SCL
SDA
0.25
0
–0.25
–0.50
–0.75
–1.00
INTERNAL
2.5V REF
2.2μF
REFCOMP
GND
0.1μF
10μF
2309 TA01
0
1024
2048
OUTPUT CODE
3072
4096
2309 G01
2309f
1
LTC2309
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
GND
GND
GND
UF PACKAGE
24-LEAD (4mm 4mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 37°C/W
EXPOSED PAD (PIN 25) IS GND, MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC2309CUF#PBF
LTC2309IUF#PBF
TAPE AND REEL
LTC2309CUF#TRPBF
LTC2309IUF#TRPBF
PART MARKING*
2309
2309
PACKAGE DESCRIPTION
24-Lead (4mm
×
4mm) Plastic QFN
24-Lead (4mm
×
4mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
REFCOMP
AV
DD
V
REF
Supply Voltage (AV
DD
, DV
DD
) ...................... –0.3V to 6V
Analog Input Voltage (Note 3)
CH0-CH7, COM, V
REF
,
REFCOMP ...................(GND – 0.3V) to (AV
DD
+ 0.3V)
Digital Input Voltage (Note 3).................(GND – 0.3V) to
(DV
DD
+ 0.3V)
Digital Output Voltage .... (GND – 0.3V) to (DV
DD
+ 0.3V)
Power Dissipation ...............................................500mW
Operating Temperature Range
LTC2309C ................................................ 0°C to 70°C
LTC2309I.............................................. –40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
PIN CONFIGURATION
TOP VIEW
DV
DD
GND
GND
18 GND
17 SDA
25
16 SCL
15 AD1
14 AD0
13 AV
DD
7
8
9 10 11 12
CH2
CH1
CH0
24 23 22 21 20 19
CH3 1
CH4 2
CH5 3
CH6 4
CH7 5
COM 6
2309f
2
LTC2309
CONVERTER AND MULTIPLEXER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity Error
Bipolar Zero Error
Bipolar Zero Error Drift
Bipolar Zero Error Match
Unipolar Zero Error
Unipolar Zero Error Drift
Unipolar Zero Error Match
Bipolar Full-Scale Error
Bipolar Full-Scale Error Drift
Bipolar Full-Scale Error Match
Unipolar Full-Scale Error
Unipolar Full-Scale Error Drift
Unipolar Full-Scale Error Match
CONDITIONS
l
The
l
denotes the specifications
which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C. (Notes 4, 5)
MIN
12
TYP
±0.45
±0.35
±1
0.002
±0.1
±0.4
0.002
±0.2
±0.5
±0.4
0.05
±0.4
±0.4
±0.3
0.05
±0.3
MAX
±1
±1
±8
±3
±6
±1
±10
±9
±3
±10
±6
±2
UNITS
Bits
LSB
LSB
LSB
LSB/°C
LSB
LSB
LSB/°C
LSB
LSB
LSB
LSB/°C
LSB
LSB
LSB
LSB/°C
LSB
(Note 6)
(Note 7)
l
l
l
(Note 7)
l
External Reference (Note 8)
REFCOMP = 4.096V
External Reference
External Reference (Note 8)
REFCOMP = 4.096V
External Reference
l
l
l
l
ANALOG INPUT
SYMBOL
V
IN+
V
IN–
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
PARAMETER
Absolute Input Range (CH0 to CH7)
Absolute Input Range (CH0 to CH7, COM)
CONDITIONS
(Note 9)
Unipolar (Note 9)
Bipolar (Note 9)
V
IN
= V
IN+
– V
IN–
(Unipolar)
V
IN
= V
IN+
– V
IN–
(Bipolar)
Sample Mode
Hold Mode
l
l
l
l
l
l
MIN
–0.05
–0.05
–0.05
TYP
MAX
AV
DD
AV
DD
/2
AV
DD
V
IN+
– V
IN–
Input Differential Voltage Range
I
IN
C
IN
CMRR
Analog Input Leakage Current
Analog Input Capacitance
Input Common Mode Rejection Ratio
0 to REFCOMP
±REFCOMP/2
±1
55
5
70
UNITS
V
V
V
V
V
μA
pF
pF
dB
DYNAMIC ACCURACY
SYMBOL
SINAD
SNR
THD
SFDR
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Notes 4, 10)
PARAMETER
Signal-to-(Noise + Distortion) Ratio
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious Free Dynamic Range
Channel-to-Channel Isolation
Full Linear Bandwidth
–3dB Input Linear Bandwidth
Aperature Delay
Transient Response
CONDITIONS
f
IN
= 1kHz
f
IN
= 1kHz
f
IN
= 1kHz, First 5 Harmonics
f
IN
= 1kHz
f
IN
= 1kHz
(Note 11)
l
l
l
l
MIN
71
71
79
Full-Scale Step
TYP
73.3
73.4
–88
90
–109
700
25
13
240
MAX
–77
UNITS
dB
dB
dB
dB
dB
kHz
MHz
ns
ns
2309f
3
LTC2309
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Output Impedance
V
REFCOMP
Output Voltage
V
REF
Line Regulation
CONDITIONS
I
OUT
= 0
I
OUT
= 0
–0.1mA ≤ I
OUT
≤ 0.1mA
I
OUT
= 0
AV
DD
= 4.75V to 5.25V
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
l
MIN
2.47
TYP
2.50
±25
8
4.096
0.8
MAX
2.53
UNITS
V
ppm/°C
kΩ
V
mV/V
I
2
C INPUTS AND DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
V
IHA
V
ILA
R
INH
R
INL
R
INF
I
I
V
HYS
V
OL
t
OF
t
SP
C
CAX
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Voltage for Address Pins A1, A0
Low Level Input Voltage for Address Pins A1, A0
Resistance from A1, A0, to V
CC
to Set Chip
Address Bit to 1
Resistance from A1, A0 to GND to Set Chip
Address Bit to 0
Resistance from A1, A0 to GND or V
CC
to Set
Chip Address Bit to Float
Digital Input Current
Hysteresis of Schmitt Trigger Inputs
Low Level Output Voltage (SDA)
Output Fall Time V
H
to V
IL(MAX)
Input Spike Suppression
External Capacitance Load On Chip Address Pins
(A1, A0) for Valid Float
The
l
denotes the specifications which apply over the full
operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
l
l
l
l
l
l
l
l
MIN
0.7V
CC
0.95V
CC
TYP
MAX
0.3V
CC
0.05V
CC
10
10
UNITS
V
V
V
V
kΩ
kΩ
MΩ
2
–10
0.05V
CC
20 + 0.1C
B
10
0.4
250
50
10
(Note 9)
I = 3mA
(Note 12)
l
l
l
l
l
μA
V
V
ns
ns
pF
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
AV
DD
DV
DD
I
DD
PARAMETER
Analog Supply Voltage
Digital Supply Voltage
Supply Current
Nap Mode
Sleep Mode
Power Dissipation
Nap Mode
Sleep Mode
CONDITIONS
POWER REQUIREMENTS
The
l
denotes the specifications which apply over the full operating temperature
l
l
MIN
4.75
4.75
P
D
14ksps Sample Rate
SLP Bit = 0, Conversion Done
SLP Bit = 1, Conversion Done
14ksps Sample Rate
SLP Bit = 0, Conversion Done
SLP Bit = 1, Conversion Done
l
l
l
TYP
5
5
2.3
210
7
11.5
1.05
35
MAX
5.25
5.25
3
350
15
15
1.75
75
UNITS
V
V
mA
μA
μA
mW
mW
μW
2309f
4
LTC2309
I
2
C TIMING CHARACTERISTICS
SYMBOL
f
SCL
t
HD(SDA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
t
BUF
PARAMETER
SCL Clock Frequency
Hold Time (Repeated) Start Condition
Low Period of the SCL Pin
High Period of the SCL Pin
Set-Up Time for a Repeated Start Condition
Data Hold Time
Data Set-Up Time
Rise Time for SDA/SCL Signals
Fall Time for SDA/SCL Signals
Set-Up Time for Stop Condition
Bus Free Time Between a Stop and Start Condition
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
l
l
l
l
l
l
l
MIN
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
TYP
MAX
400
0.9
300
300
(Note 12)
(Note 12)
l
l
l
l
UNITS
kHz
μs
μs
μs
μs
μs
ns
ns
ns
μs
μs
ADC TIMING CHARACTERISTICS
SYMBOL
f
SMPL
t
CONV
t
ACQ
t
REFWAKE
PARAMETER
Throughput Rate (Successive Reads)
Conversion Time
Acquisition Time
REFCOMP Wake-Up Time (Note 13)
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
l
MIN
l
l
TYP
1.3
200
(Note 9)
(Note 9)
C
REFCOMP
= 10μF C
REF
= 2.2μF
,
MAX
14
1.8
240
UNITS
ksps
μs
ns
ms
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with AV
DD
and DV
DD
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below ground or above V
DD
,
they will be clamped by internal diodes. These products can handle input
currents greater than 100mA below ground or above V
DD
without latchup.
Note 4:
AV
DD
= 5V, DV
DD
= 5V, f
SMPL
= 14ksps internal reference unless
otherwise noted.
Note 5:
Linearity, offset and full-scale specifications apply for a
single-ended analog input with respect to COM.
Note 6:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 7:
Bipolar zero error is the offset voltage measured from –0.5LSB
when the output code flickers between 0000 0000 0000 and 1111 1111
1111. Unipolar zero error is the offset voltage measured from +0.5LSB
when the output code flickers between 0000 0000 0000 and 0000 0000
0001.
Note 8:
Full-scale bipolar error is the worst-case of –FS or +FS untrimmed
deviation from ideal first and last code transitions and includes the effect
of offset error. Unipolar full-scale error is the deviation of the last code
transition from ideal and includes the effect of offset error.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
All specifications in dB are referred to a full-scale ±2.048V input
with a 2.5V reference voltage.
Note 11:
Full linear bandwidth is defined as the full-scale input frequency
at which the SINAD degrades to 60dB or 10 bits of accuracy.
Note 12:
C
B
= capacitance of one bus line in pF (10pF ≤ C
B
≤ 400pF).
Note 13:
REFCOMP wake-up time is the time required for the REFCOMP
pin to settle within 0.5LSB at 12-bit resolution of its final value after
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