Data Sheet
May 2001
LG1627BXC Clocked Laser Driver
Features
s
s
s
s
Functional Description
The LG1627BXC is a gallium arsenide (GaAs) laser
diode driver to be used with direct modulated laser
diodes in high-speed non-return-to-zero (NRZ) trans-
mission systems. The device is made in a high-
performance 0.9 µm gate GaAs hetero-junction FET
technology that utilizes high-density MIM capacitors,
airbridge interconnect, and NiCr film precision resis-
tors. The driver includes differential data and clock
inputs. The high-output, low overshoot drive current
and prebias can be set separately. Data retiming is
accomplished by the internal flip-flop, minimizing
jitter on the data. Clocking can be disabled for data
feedthrough. A pulse-width control enables the user
to compensate for laser turn-on delay. A 2.5 V band-
gap reference is required for stable operation over
temperature and varying power supply voltage.
High data-rate clocked laser diode driver
Clock disable mode for data feedthrough
Adjustable high output current
Operation up to 3 Gbits/s
Applications
s
s
s
SONET/SDH transmission systems
SONET/SDH test equipment
Optical transmitters
Functional Diagram
GND
BG2P5
MK
V
TH
V
IN
V
IN
CLK
CLK
CLK_E
MOD_E
PWN
PWP
5-6549(F).b
MK
V
PRE
I
OUT-PRE
LG1627BXC
I
OUT
V
MOD
V
SS3
V
SS2
V
SS1
Figure 1. Functional Diagram
LG1627BXC Clocked Laser Driver
Data Sheet
May 2001
Block Diagram
CLK_E
PWP PWN
GND
MK MK V
MOD
V
PRE
I
OUT-PRE
V
TH
V
IN
V
IN
50
Ω
50
Ω
I
OUT
D
Q
22
Ω
GND
CLK
CLK
50
Ω
50
Ω
BG2P5
V
SS1
MOD_E
V
SS3
V
SS2
5-7675(F)r.1
Figure 2. Block Diagram
2
Agere Systems Inc.
Data Sheet
May 2001
LG1627BXC Clocked Laser Driver
Pin Information
CLK_E
V
MOD
V
SS1
V
SS1
V
SS3
V
SS2
24 23 22 21 20 19
V
TH
V
IN
V
IN
GND
CLK
CLK
1
2
3
4
5
6
7
8
18
17
16
15
14
13
9 10 11 12
V
PRE
I
OUT-PRE
I
OUT
I
OUT
GND
GND
BG2P5
MOD_E
PWN
PWP
MK
MK
5-6551(F).br.3
Figure 3. Pin Diagram
Table 1. Pin Descriptions
Pin
1
2
3
4, 13, 14,
package
bottom
5
6
7
8
9
10
11
12
15, 16
17
18
19
20
21
22, 23
24
Symbol
V
TH
V
IN
V
IN
GND
Description
Capacitor to ground (data input reference).
Data input.
Complementary data input.
Ground. For optimum performance, the package bottom must be soldered to the
ground plane.
Clock input.
Complementary clock input.
−
2.5 V band-gap reference (National
Semiconductor
* p/n LM4040).
Modulation enable (connect to V
SS1
to enable, float to disable).
Pulse width adjust positive.
Pulse width adjust negative.
Complementary mark density output.
Mark density output.
Output modulation current (dc coupled to laser cathode).
Output prebias current.
Prebias control input.
V
SS2
supply
−
5.2 V for output prebias.
V
SS3
supply
−
5.2 V for output modulation.
Modulation current control input.
V
SS1
supply
−
5.2 V.
Clock enable (connect to V
SS1
to enable, float to disable).
3
CLK
CLK
BG2P5
MOD_E
PWP
PWN
MK
MK
I
OUT
I
OUT-PRE
V
PRE
V
SS2
V
SS3
V
MOD
V
SS1
CLK_E
*
National Semiconductor
is a registered trademark of National Semiconductor Corporation.
Agere Systems Inc.
LG1627BXC Clocked Laser Driver
Data Sheet
May 2001
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Supply Voltage
Input Voltage
Power Dissipation
Storage Temperature
Operating Case Temperature Range
Symbol
V
SS
V
I
P
D
T
stg
T
C
Min
—
GND
—
−40
0
Max
–5.7
V
SS
1
125
100
Unit
V
V
W
°C
°C
Recommended Operating Conditions
Table 3. Recommended Operating Conditions
Parameter
Case Temperature
Power Supply
Symbol
t
CASE
V
SS
Min
0
–4.7
Max
70
–5.7
Unit
°C
V
Handling Precautions
Although protection circuitry has been designed into this device, proper precautions should be taken to avoid expo-
sure to electrostatic discharge (ESD) during handling and mounting. Lucent employs a human-body model (HBM)
and a charged-device model (CDM) for ESD-susceptibility testing and protection design evaluation. ESD voltage
thresholds are dependent on the circuit parameters used to define the model. No industry-wide standard has been
adopted for the CDM. However, a standard HBM (resistance = 1500
Ω,
capacitance = 100 pF) is widely used and,
therefore, can be used for comparison. The HBM ESD threshold presented here was obtained by using these cir-
cuit parameters.
Table 4. ESD Threshold Voltage
Human-Body Model ESD Threshold
Device
LG1627BXC
Voltage
>200
Mounting and Connections
Certain precautions must be taken when using solder. For installation using a constant temperature solder, temper-
atures of under 300 °C may be employed for periods of time up to 5 seconds, maximum. For installation with a sol-
dering iron (battery operated or nonswitching only), the soldering tip temperature should not be greater than
300 °C and the soldering time for each lead must not exceed 5 seconds. This device is supplied with solder on the
back of the package. For optimum performance, it is recommended to solder the back of the package to ground.
4
Agere Systems Inc.
Data Sheet
May 2001
LG1627BXC Clocked Laser Driver
Electrical Characteristics
(T
A
= 25 °C, V
SS1
= V
SS2
= V
SS3
= –5.2 V, data input = 600 mV (single ended),
and R
L
= 50
Ω)
Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are
the result of engineering evaluations. Typical values are for information purposes only and are not part of the test-
ing requirements. Stresses in excess of the absolute maximum ratings can cause permanent damage to the
device.
Table 5. Electrical Characteristics
Parameter
Data Input Voltage, Single Ended
Power Supply Voltage
Power Supply Current
1
Voltage Control for Output Modulation Current
Output Minimum Modulation Current
Output Maximum Modulation Current
2
Voltage Control for Prebias Current
Output Minimum Prebias Current
Output Maximum Prebias Current
3
Mark Density, 50% Duty Cycle (1 k
Ω
to GND)
Mark Density Complement, 50% Duty Cycle
(1 k
Ω
to GND)
Pulse Width Adjust Plus
Pulse Width Adjust Negative
Output Modulation I
OUT
= 40 mA, Clock Enabled
Output Rise and Fall Times (20%—80%)
Jitter (rms)
Phase Margin
Output Modulation I
OUT
= 40 mA, Clock Disabled
Output Rise and Fall Times (20%—80%)
Jitter (rms)
Output Modulation I
OUT
= 80 mA, Clock Enabled
Output Rise and Fall Times (20%—80%)
Jitter (rms)
Phase Margin
Output Modulation I
OUT
= 80 mA, Clock Disabled
Output Rise and Fall Times (20%—80%)
Jitter (rms)
t
R
, t
F
—
—
—
100
6
—
—
ps
ps
t
R
, t
F
—
—
—
—
—
100
4
270
—
—
—
ps
ps
deg
t
R
, t
F
—
—
—
90
6
—
—
ps
ps
t
R
, t
F
—
—
—
—
—
90
4
270
—
—
—
ps
ps
deg
Symbol
V
IN
V
SS1
, V
SS2
, V
SS3
I
SS1
V
MOD
I
OUT LOW
I
OUT HIGH
V
PRE
I
PRE LOW
I
PRE HIGH
MK
MK
PWP
PWN
Min
300
–4.9
100
–4.0
—
75
–3.0
—
50
—
—
–3.0
–3.0
Typ
600
–5.2
140
—
0
85
—
0
60
–0.5
–0.5
–4.2
–4.2
Max
1000
–5.5
160
–5.5
2
—
–5.5
0.5
—
—
—
–5.5
–5.5
Unit
mV
V
mA
V
mA
mA
V
mA
mA
V
V
V
V
1. Excludes I
PRE
and average I
MOD
.
Power supply current I
SS2
(relating to prebias) is dependent on V
PRE
.
Power supply current I
SS3
(relating to modulation) is dependent on V
MOD
.
2. Maximum modulation at maximum V
MOD
.
3. Maximum prebias at maximum V
PRE
.
Agere Systems Inc.
5
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