CM2030
HDMI Transmitter Port Protection and Interface Device
Features
•
•
•
•
•
•
•
•
•
•
•
HDMI 1.3 compliant
Supports thin dielectric and 2-layer boards
Minimizes TMDS skew with 0.05pF matching
Long HDMI cable support with integrated I
2
C
accelerator
Active termination and slew rate limiting for CEC
Supports direct connection to CEC microcontroller
Integrated I
2
C level shifting to CMOS level includ
ing low logic level voltages
Integrated 8kV ESD protection and backdrive pro
tection on all external I/O lines
Integrated overcurrent output protection per HDMI
1.3
Multiport I
2
C support eliminates need for analog
mux on DDC lines
Simplified layout with matched 0.5mm trace spac
ing
Product Description
The CM2030 HDMI Transmitter Port Protection and
Interface Device is specifically designed for next gener
ation HDMI Host interface protection.
An integrated package provides all ESD, slew rate lim
iting on CEC line, level shifting/isolation, overcurrent
output protection and backdrive protection for an HDMI
port in a single 38-Pin TSSOP package.
The CM2030 part is specifically designed to provide
the designer with the most reliable path to HDMI 1.3
CTS compliance.
The CM2030 also incorporates a silicon overcurrent
protection device for +5V supply voltage output to the
connector.
Applications
•
•
PC and consumer electronics
Set top box, DVD RW, PC, graphics cards
Electrical Schematic
5V_SUPPLY
TMDS_D2+
TMDS_GND
TMDS_D2
TMDS_D1+
TMDS_GND
TMDS_D1
TMDS_D0+
TMDS_GND
TMDS_D0
TMDS_CK+
TMDS_GND
TMDS_CK
5V_SUPPLY
LV_SUPPLY
LV_SUPPLY
5V_SUPPLY
DYNAMIC
PULLUP
DDC_CLK_OUT
DDC_DAT_IN
DYNAMIC
PULLUP
DDC_DAT_OUT
DDC_CLK_IN
CMOS/I2C
LEVEL SHIFT
CMOS/I2C
LEVEL SHIFT
CE_SUPPLY
LV_SUPPLY
I
S
CE_SUPPLY
ACTIVE SLEW
RATE
LIMITING
CE_REMOTE_OUT
HOTPLUG_DET_IN
3I
S
HOTPLUG_DET_OUT
CE_REMOTE_IN
5V_SUPPLY
55mA
OVERCURRENT
SWITCH
5V_OUT
© 2007 California Micro Devices Corp. All rights reserved.
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
Issue A – 11/16/07
●
Fax: 408.263.7846
●
www.cmd.com
1
CM2030
PACKAGE / PINOUT DIAGRAM
TOP VIEW
5V_SUPPLY
LV_SUPPLY
GND
TMDS_D2+
TMDS_GND
TMDS_D2–
TMDS_D1+
TMDS_GND
TMDS_D1–
TMDS_D0+
TMDS_GND
TMDS_D0–
TMDS_CK+
TMDS_GND
TMDS_CK–
CE_REMOTE_IN
DDC_CLK_IN
DDC_DAT_IN
HOTPLUG_DET_IN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
5V_OUT
CE_SUPPLY
GND
TMDS_D2+
TMDS_GND
TMDS_D2–
TMDS_D1+
TMDS_GND
TMDS_D1–
TMDS_D0+
TMDS_GND
TMDS_D0–
TMDS_CK+
TMDS_GND
TMDS_CK–
CE_REMOTE_OUT
DDC_CLK_OUT
DDC_DAT_OUT
HOTPLUG_DET_OUT
Note: This drawing is not to scale.
38-PIN TSSOP PACKAGE
PIN DESCRIPTIONS
PINS
4, 35
6, 33
7, 32
9, 30
10, 29
12, 27
13, 26
15, 24
16
23
17
22
18
21
19
20
2
37
1
NAME
TMDS_D2+
TMDS_D2–
TMDS_D1+
TMDS_D1–
TMDS_D0+
TMDS_D0–
TMDS_CK+
TMDS_CK–
CE_REMOTE_IN
CE_REMOTE_OUT
DDC_CLK_IN
DDC_CLK_OUT
DDC_DAT_IN
DDC_DAT_OUT
HOTPLUG_DET_IN
HOTPLUG_DET_OUT
LV_SUPPLY
CE_SUPPLY
5V_SUPPLY
ESD Level
8kV
3
8kV
3
8kV
3
8kV
3
8kV
3
8kV
3
8kV
3
8kV
3
2kV
4
8kV
3
2kV
4
8kV
3
2kV
4
8kV
3
2kV
4
8kV
3
2kV
4
2kV
4,2
2kV
4
DESCRIPTION
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
TMDS 0.9pF ESD protection.
1
CE_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD.
6
LV_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD.
6
LV_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD.
6
LV_SUPPLY referenced logic level in.
5V_SUPPLY referenced logic level out plus 10pF ESD. A 0.1μF
bypass ceramic capacitor is recommended on this pin.
2
Bias for CE / DDC / HOTPLUG level shifters.
CEC bias voltage. Previously CM2020 ESD_BYP pin.
Current source for 5V_OUT, VREF for DDC I
2
C voltage references,
and bias for 8kV ESD pins.
© 2007 California Micro Devices Corp. All rights reserved.
2
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
Issue A – 11/16/07
●
Fax: 408.263.7846
●
www.cmd.com
CM2030
PIN DESCRIPTIONS (CONTINUED)
38
3, 5, 8, 11,
14, 25,
28, 31, 34,
36
5V_OUT
GND / TMDS_GND
8kV
3
N/A
55mA minimum overcurrent protected 5V output. This output must be
bypassed with a 0.1μF ceramic capacitor.
GND reference.
Note 1: These 2 pins need to be connected together in-line on the PCB. See recommended layout diagram.
Note 2: This output can be connected to an external 0.1
μ
F ceramic capacitor/pads to maintain backward compatibility with the
CM2020.
Note 3: Standard IEC 61000-4-2, C
DISCHARGE
=150pF, R
DISCHARGE
=330
Ω
, 5V_SUPPLY and LV_SUPPLY within recommended
operating conditions, GND=0V, 5V_OUT (pin 38), and HOTPLUG_DET_OUT (pin 20) each bypassed with a 0.1
μ
F ceramic
capacitor connected to GND.
Note 4: Human Body Model per MIL-STD-883, Method 3015, C
DISCHARGE
=100pF, R
DISCHARGE
=1.5k
Ω
, 5V_SUPPLYand
LV_SUPPLY within recommended operating conditions, GND=0V, 5V_OUT (pin 38), and HOTPLUG_DET_OUT (pin 20)
each bypassed with a 0.1
μ
F ceramic capacitor connected to GND.
Note 5: These pins should be routed directly to the associated GND pins on the HDMI connector with single point ground vias at the
connector.
Note 6: The slew-rate control and active acceleration circuitry dynamically offsets the system capacitive load on these pins.
© 2007 California Micro Devices Corp. All rights reserved.
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
Issue A – 11/16/07
●
Fax: 408.263.7846
●
www.cmd.com
3
CM2030
Backdrive Protection and Isolation
Backdrive current is defined as the undesirable current
flow through an I/O pin when that I/O pin’s voltage
exceeds the related local supply voltage for that cir
cuitry. This is a potentially common occurrence in mul
timedia
entertainment systems
with multiple
components and several power plane domains in each
system.
For example, if a DVD player is switched off and an
HDMI connected TV is powered on, there is a possibil
ity of reverse current flow back into the main power
supply rail of the DVD player from pull-ups in the TV. As
little as a few milliamps of backdrive current flowing
back into the power rail can charge the DVD player’s
bulk bypass capacitance on the power rail to some
intermediate level. If this level rises above the power-
on-reset (POR) voltage level of some of the integrated
circuits in the DVD player, then these devices may not
reset properly when the DVD player is turned back on.
If any SOC devices are incorporated in the design
which have built-in level shifter and/or ESD protection
structures, there can be a risk of permanent damage
due to backdrive. In this case, backdrive current can
forward bias the on-chip ESD protection structure. If
the current flow is high enough, even as little as a few
milliamps, it could destroy one of the SOC chip’s inter
nal DRC diodes, as they are not designed for passing
DC.
To avoid either of these situations, the CM2030 was
designed to block backdrive current, guaranteeing less
than 5μA into any I/O pin when the I/O pin voltage
exceeds its related operating CM2030 supply voltage.
LV_SUPPLY
=OFF
+5V
+5V
LV_SUPPLY
=OFF
LOW VOLTAGE
HDMI ASIC
ASIC
LOW VOLTAGE
HDMI ASIC
ASIC
HDMI SOURCE
HDMI SINK
HDMI SOURCE
HDMI SINK
Figure 1. Backdrive Protection Diagram.
Display Data Channel (DDC) lines
The DDC interface is based on the I
2
C serial bus proto
col for EDID configuration.
DYNAMIC PULLUPS
Based on the HDMI specification, the maximum capac
itance of the DDC line can approach 800pF (50pF from
source, 50pF from sink, and 700pF from cable). At the
upper range of capacitance values (i.e. long cables), it
becomes impossible for the DDC lines to meet the I
2
C
timing specifications with the minimum pull-up resistor
of 1.5k
Ω
.
For this reason, the CM2030 was designed with an
internal I
2
C accelerator to meet the AC timing specifi
cation even with very long and non-compliant cables.
The internal accelerator increases the positive slew
rate of the DDC_CLK_OUT and DDC_DAT_OUT lines
whenever the sensed voltage level exceeds
0.3*5V_SUPPLY (approximately 1.5V). This provides
faster overall risetime in heavily loaded situations with
out overloading the multi-drop open drain I
2
C outputs
elsewhere.
© 2007 California Micro Devices Corp. All rights reserved.
4
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
Issue A – 11/16/07
●
Fax: 408.263.7846
●
www.cmd.com
CM2030
DYNAMIC PULLUPS
(CONT’D)
Figure 2. Dynamic DDC Pullups
(Discrete - Top, CM2030 - Bottom; 3.3V ASIC - Left, 5V Cable - Right.)
Figure 2 demonstrates the “worst case” operation of
the dynamic CM2030 DDC level shifting circuitry (bot
tom) against a discrete NFET common-gate level
shifter circuit with a typical 1.5k
Ω
pullup at the source
(top.) Both are shown driving an off-spec, but unfortu
nately readily available 31m HDMI cable which
exceeds the 700pF HDMI specification. Some widely
available HDMI cables have been measured at
over
4nF.
When the standard I/OD cell releases the NFET dis
crete shifter, the risetime is limited by the pullup and
the parasitics of the cable, source and sink. For long
cables, this can extend the risetime and reduce the
margin for reading a valid “high” level on the data line.
In this case, an HDMI source may not be able to read
uncorrupted data and will not be able to initiate a link.
With the CM2030’s dynamic pullups, when the ASIC
driver releases its DDC line and the “OUT” line reaches
at least 0.3*VDD (of 5V_SUPPLY), then the “OUT”
active pullups are enabled and the CM2030 takes over
driving the cable until the “OUT” voltage approaches
the 5V_SUPPLY rail.
The internal pass element and the dynamic pullups
also work together to damp reflections on the longer
cables and keep them from glitching the local ASIC.
I
2
C LOW LEVEL SHIFTING
In addition to the Dynamic Pullups described in the
previous section, the CM2030 also incorporates
improved I
2
C low-level shifting on the DDC_CLK_IN
and DDC_DAT_IN lines for enhanced compatibility.
Typical discrete NFET level shifters can advertise
specifications for low R
DS
[on], but usually state rela
tively high V
[GS]
test parameters, requiring a 'switch'
signal (gate voltage) as high as 10V or more. At a sink
current of 4mA for the ASIC on DDC_XX_IN, the
CM2030 guarantees no more than 140mV increase to
DDC_XX_OUT, even with a switching control of 2.5V
on LV_SUPPLY.
When I
2
C devices are driving the external cable, an
internal pulldown on DDC_XX_IN guarantees that the
VOL seen by the ASIC on DDC_XX_IN is equal to or
lower than DDC_XX_OUT.
Multiport DDC Multiplexing
By switching LV_SUPPLY, the DDC/HPD blocks can be
independently disabled by engaging their inherent
“backdrive” protection. This allows N:1 multiplexing of
the low-speed HDMI signals without any additional
FET switches.
Consumer Electronics Control (CEC)
The Consumer Electronics Control (CEC) line is a high
level command and control protocol, based on a single
wire multidrop open drain communication bus running
at approximately 1kHz (See Figure 3). While the HDMI
link provides only a single point-to-point connection, up
© 2007 California Micro Devices Corp. All rights reserved.
490 N. McCarthy Blvd., Milpitas, CA 95035-5112
●
Tel: 408.263.3214
Issue A – 11/16/07
●
Fax: 408.263.7846
●
www.cmd.com
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
