To all our customers
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Cautions
Keep safety first in your circuit designs!
1.
Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but
there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire
or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i)
placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or
mishap.
Notes regarding these materials
1.
These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation
product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any
other rights, belonging to Renesas Technology Corporation or a third party.
2.
Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights,
originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in
these materials.
3.
All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents
information on products at the time of publication of these materials, and are subject to change by Renesas Technology
Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact
Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these
inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corporation by various means, including the
Renesas Technology Corporation Semiconductor home page (http://www.renesas.com).
4.
When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and
algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of
the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other
loss resulting from the information contained herein.
5.
Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used
under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an
authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for
any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea
repeater use.
6.
The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these
materials.
7.
If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license
from the Japanese government and cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is
prohibited.
8.
Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.
H8/3657 Series
HD6473657, HD6433657
H8/3656
HD6433656
H8/3655
HD6433655
H8/3654
HD6433654
H8/3653
HD6433653
H8/3652
HD6433652
Hardware Manual
Preface
The H8/300L Series of single-chip microcomputers has the high-speed H8/300L CPU at its core,
with many necessary peripheral functions on-chip. The H8/300L CPU instruction set is compatible
with the H8/300 CPU.
The H8/3657 Series has a system-on-a-chip architecture that includes such peripheral functions as a
five timers, a 14-bit PWM, a two-channel serial communication interface, and an A/D converter.
This makes it ideal for use in advanced control systems.
This manual describes the hardware of the H8/3657 Series. For details on the H8/3657 Series
instruction set, refer to the H8/300L Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview
..........................................................................................................
Overview.........................................................................................................................
Internal Block Diagram ..................................................................................................
Pin Arrangement and Functions .....................................................................................
1.3.1 Pin Arrangement.................................................................................................
1.3.2 Pin Functions ......................................................................................................
1
1
5
6
6
8
Section 2
2.1
CPU
................................................................................................................... 11
11
11
12
12
13
13
13
15
15
16
17
18
18
20
24
26
28
29
29
31
35
37
38
40
40
41
43
43
44
44
44
45
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview.........................................................................................................................
2.1.1 Features...............................................................................................................
2.1.2 Address Space.....................................................................................................
2.1.3 Register Configuration........................................................................................
Register Descriptions......................................................................................................
2.2.1 General Registers................................................................................................
2.2.2 Control Registers ................................................................................................
2.2.3 Initial Register Values ........................................................................................
Data Formats...................................................................................................................
2.3.1 Data Formats in General Registers .....................................................................
2.3.2 Memory Data Formats........................................................................................
Addressing Modes ..........................................................................................................
2.4.1 Addressing Modes ..............................................................................................
2.4.2 Effective Address Calculation ............................................................................
Instruction Set.................................................................................................................
2.5.1 Data Transfer Instructions ..................................................................................
2.5.2 Arithmetic Operations ........................................................................................
2.5.3 Logic Operations ................................................................................................
2.5.4 Shift Operations ..................................................................................................
2.5.5 Bit Manipulations ...............................................................................................
2.5.6 Branching Instructions........................................................................................
2.5.7 System Control Instructions ...............................................................................
2.5.8 Block Data Transfer Instruction .........................................................................
Basic Operational Timing...............................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .......................................................
2.6.2 Access to On-Chip Peripheral Modules .............................................................
CPU States ......................................................................................................................
2.7.1 Overview.............................................................................................................
2.7.2 Program Execution State ...................................................................................
2.7.3 Program Halt State..............................................................................................
2.7.4 Exception-Handling State...................................................................................
Memory Map ..................................................................................................................
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