To all our customers
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
Cautions
Keep safety first in your circuit designs!
1.
Renesas Technology Corporation puts the maximum effort into making semiconductor products better and more reliable, but
there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire
or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i)
placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or
mishap.
Notes regarding these materials
1.
These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corporation
product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any
other rights, belonging to Renesas Technology Corporation or a third party.
2.
Renesas Technology Corporation assumes no responsibility for any damage, or infringement of any third-party's rights,
originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in
these materials.
3.
All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents
information on products at the time of publication of these materials, and are subject to change by Renesas Technology
Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact
Renesas Technology Corporation or an authorized Renesas Technology Corporation product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corporation assumes no responsibility for any damage, liability, or other loss rising from these
inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corporation by various means, including the
Renesas Technology Corporation Semiconductor home page (http://www.renesas.com).
4.
When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and
algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of
the information and products. Renesas Technology Corporation assumes no responsibility for any damage, liability or other
loss resulting from the information contained herein.
5.
Renesas Technology Corporation semiconductors are not designed or manufactured for use in a device or system that is used
under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corporation or an
authorized Renesas Technology Corporation product distributor when considering the use of a product contained herein for
any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea
repeater use.
6.
The prior written approval of Renesas Technology Corporation is necessary to reprint or reproduce in whole or in part these
materials.
7.
If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license
from the Japanese government and cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is
prohibited.
8.
Please contact Renesas Technology Corporation for further details on these materials or the products contained therein.
Hitachi Microcomputer
H8/3002
HD6413002
Hardware Manual
ADE-602-066
Preface
The H8/3002 is a high-performance single-chip microcontroller that integrates system supporting
functions together with an H8/300H CPU core.
The H8/300H CPU has a 32-bit internal architecture with sixteen 16-bit general registers, and a
concise, optimized instruction set designed for speed. It can address a 16-Mbyte linear address
space.
The on-chip system supporting functions include RAM, a 16-bit integrated timer unit (ITU), a
programmable timing pattern controller (TPC), a watchdog timer (WDT), two serial
communication interfaces (SCI), an A/D converter, I/O ports, a direct memory access controller
(DMAC), a refresh controller, and other facilities.
The address space is divided into eight areas. The data bus width and access cycle length can be
selected independently in each area, simplifying the connection of different types of memory. Four
operating modes (modes 1 to 4) are provided, offering a choice of initial data bus width and
address space size.
With these features, the H8/3002 can be used to implement compact, high-performance systems
easily.
This manual describes the H8/3002 hardware. For details of the instruction set, refer to the
H8/300H Series Programming Manual.
Contents
Section 1
1.1
1.2
1.3
Overview
.....................................................................................................
1.4
Overview ........................................................................................................................
Block Diagram................................................................................................................
Pin Description ...............................................................................................................
1.3.1
Pin Arrangement.............................................................................................
1.3.2
Pin Functions ..................................................................................................
Pin Functions ..................................................................................................................
1
1
5
6
6
8
12
Section 2
2.1
CPU
............................................................................................................... 17
17
17
18
19
20
21
21
22
23
24
25
25
26
28
28
29
30
40
41
41
41
44
48
48
49
49
51
52
52
52
2.2
2.3
2.4
2.5
2.6
2.7
2.8
Overview ........................................................................................................................
2.1.1
Features...........................................................................................................
2.1.2
Differences from H8/300 CPU .......................................................................
CPU Operating Modes....................................................................................................
Address Space.................................................................................................................
Register Configuration....................................................................................................
2.4.1
Overview.........................................................................................................
2.4.2
General Registers............................................................................................
2.4.3
Control Registers ............................................................................................
2.4.4
Initial CPU Register Values ............................................................................
Data Formats...................................................................................................................
2.5.1
General Register Data Formats.......................................................................
2.5.2
Memory Data Formats....................................................................................
Instruction Set.................................................................................................................
2.6.1
Instruction Set Overview ................................................................................
2.6.2
Instructions and Addressing Modes................................................................
2.6.3
Tables of Instructions Classified by Function ................................................
2.6.4
Basic Instruction Formats ...............................................................................
2.6.5
Notes on Use of Bit Manipulation Instructions ..............................................
Addressing Modes and Effective Address Calculation ..................................................
2.7.1
Addressing Modes ..........................................................................................
2.7.2
Effective Address Calculation ........................................................................
Processing States ............................................................................................................
2.8.1
Overview.........................................................................................................
2.8.2
Program Execution State ................................................................................
2.8.3
Exception-Handling State...............................................................................
2.8.4
Exception-Handling Sequences ......................................................................
2.8.5
Bus-Released State .........................................................................................
2.8.6
Reset State ......................................................................................................
2.8.7
Power-Down State ..........................................................................................
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