a
ONE TECHNOLOGY WAY
AN-382
APPLICATION NOTE
•
P.O. BOX 9106
•
NORWOOD, MASSACHUSETTS 02062-9106
•
617/329-4700
Applications of the SSM2120 Dynamic Range Processor
by Joe Buxton
The SSM2120 is a versatile integrated circuit that can be
used for a variety of audio dynamic range processing
functions. It integrates two voltage controlled amplifiers
(VCAs) and two level detector side chains in a single
22- pin package. With this combination, the SSM2120 is
easily configurable as a stereo compressor/limiter, an
automatic gain control amplifier, an expander, a noise
gate, or simply as a dual VCA and dual level detector.
An evaluation board
1
was developed that employs suffi-
cient flexibility to configure the SSM2120 in all the
above applications, providing a demonstration of the
full capabilities of the part. This application note refer-
ences the evaluation board and should be read in con-
junction with the data sheet to develop a full
understanding of the SSM2120.
200Ω
The functional circuit in Figure 1 shows the basic con-
nections for the VCA and level detector sections of the
SSM2120. The circuitry within the dotted boxes is in-
cluded in the SSM2120, and all the other components
are external. This circuit represents only half of the
SSM2120. The additional VCA and level detector are
functionally identical and differ only in the pin numbers.
A companion product to the SSM2120 is the SSM2122,
which integrates the two VCAs without the level detector
side chains for applications where only the VCAs are
needed. Any of the following discussion regarding the
VCA section of the SSM2120 equally applies to the
SSM2122.
10pF
7
–V
C
SIG
IN
8
2200pF
47Ω
SIG
OUT
4
SIGNAL
OUTPUT
36kΩ
SIGNAL
INPUT
36kΩ
SSM2120
+V
C
5
200Ω
1kΩ
39kΩ
VCA
1
V+
10kΩ
9
1µF
REC
IN
2V
FULL
WAVE
RECTIFIER
Q1
I
IN
Q2
I
REF
THRESH
CON
OUT
3
SIGNAL
INPUT
CONTROL
VOLTAGE
OUTPUT
SSM2120
2
LOG AV
V–
LEVEL
DETECTOR
10µF
1.5MΩ
V–
Figure 1. SSM2120 Basic Circuitry
NOTE
1
The blank evaluation PCB is available to qualified OEMs at no charge.
It was designed to accompany this application note; however, it is not
necessary since this was written as a general tutorial on the SSM2120.
The VCAs are current-in, current-out devices requiring
an external amplifier on the output to convert the cur-
rent back into a voltage. Normally, 36 k
Ω
resistors are
used on the input and in the feedback of the output am-
plifier, resulting in unity gain with a 0.0 V control signal
applied. In all the application circuits, a series combina-
tion of a 2200 pF capacitor and a 47
Ω
resistor at the sig-
nal input is required for stable operation. The SSM2120
has complementary control ports, which follow a 6 mV/
dB gain law. The minus control port (–V
C
) produces at-
tenuation for positive dc inputs, and the positive control
port (+V
C
) produces gain.
The level detectors include a full wave rectifier, a log-
ging circuit, and a unipolar drive amplifier, allowing de-
tection of signals over a 100 dB dynamic range. In
normal operation with
±15
V supplies, a 1.5 M
Ω
resistor
is connected between the LOGAV pin and the negative
supply. Doing so sets up a 10
µA
reference current in the
transistor Q2. Meanwhile, a matched logging transistor
Q1, which is diode connected, develops a forward drop
based on the input current. The higher the input current,
the larger the diode drop will be. The voltage at the
LOGAV pin is then the difference in the forward junction
drops of these two matched transistors, which is propor-
tional to the input current. Deriving the formula for the
voltage at LOGAV results in:
gain of 40. As a result, the voltage at CONOUT follows a
ratio of 120 mV/dB. This amplifier was not designed to
be unity gain stable as the open-loop gain and phase
curves in Figure 2 show. In fact, the closed-loop gain
should never be less than 40. To this end, a capacitor
should not be added in parallel with the amplifier’s feed-
back resistor. The reason for this is simple: At high fre-
quencies, the capacitor’s impedance reduces the closed
loop gain below 40. Depending on the size of the ca-
pacitor, this could occur within the frequency range of
the amplifier, resulting in oscillations.
The basic schematic for the evaluation board is shown
in Figure 3. The silkscreen and layout for both sides are
shown in Figures 4 through 6. By combining the VCA
and level detector functional blocks in different man-
ners, all of the following circuits can be designed. The
demo board uses the OP275, a high performance dual
audio amplifier, as current-to-voltage converters at the
output of the SSM2120 VCAs. Several jumpers are used
on the board to provide flexibility for different configu-
rations. These jumper positions can be hard wired for
one type of circuit, or use pin sockets and wire jumpers
for flexibility. In each of the following applications, the
jumper positions are called out on the circuit diagram.
V+
SIG 1
OUT
V
LOGAV
|I |
kT
=
ln
IN
q
I
REF
C9
0.1µF
C4
1
OP275
OUT
–IN
+IN
V–
V+ 8
C10
2
OUT 7
R21
–IN 6
+IN 5
V+
C6
0.1µF
V–
C11
0.1µF
POWER SUPPLIES
V+
V+
C15
10µF
GND
C16
10µF
V–
SIG 2
OUT
If the input current matches the reference current of
10
µA,
then the forward drop across Q1 equals the for-
ward drop across Q2, and the voltage at LOGAV will be
zero. For a typical input resistor of 10 k
Ω,
10
µA
rms of
current corresponds to a –20 dBV input (0 dBV = 1 V
rms), which gives a control voltage of 0.0 V. To either
side of zero, the V
LOGAV
follows a 3 mV/dB control law.
The LOGAV pin is buffered by an amplifier to give it a
low impedance output capable of driving a load. This
amplifier is normally configured with a noninverting
REF LEVEL
0.000dB
0.0deg
/DIV
20.000dB
45.000deg
MARKER 917 731.294Hz
32.025dB
MAG (UDF)
MARKER 917 731.294Hz
23.893deg
PHASE (A/R)
180
PHASE – Degress
R6
V+
J1
J2
J3
V–
R2
V+
D2
R1
V–
C1
C5
R3
J5
J6
V+
R9
5 +V
C1
R10
R4
R11
V–
SIG 1
IN
R12
J7
C3
R13
R14
C2 V+
V–
C8
0.1µF
C7
V–
R19
R15
10 I
REF
11 V–
LOG AV 2 13
8 SIG
IN 1
9 REC
IN 1
REC
IN 2
15
7 –V
C1
SIG
IN 2
16
6 CFT 1
–V
C2
17
CFT 2 18
3 CON
OUT 1
SIG
OUT 2
20
4 SIG
OUT 1
+V
C2
19
2 LOG AV 1
V+ 21
R8
1
R5
3
4
J4
R16
D1
R7
R17
SSM2120
THRESH 1
GND 22
V–
V+
R22
R33
R29
V–
R23
J13 J14
R24
R25
R26
C13
R31
C14
R32
D3
D4
R30
R20
V+
J11
J10
R28
J9
J8
V–
V+
C12
J12
SIG 2
IN
80
60
GAIN – dB
GAIN
135
90
40
20
0
PHASE
45
0
–45
CON
OUT 2
14
R18
R27
THRESH 2 12
–20
1k
10k
100k
FREQUENCY – Hz
1M
10M
Figure 2 Open-Loop Gain and Phase of Control
Amplifier
Figure 3. Evaluation Board Schematic
–2–
Figure 4. Silkscreen
Figure 6. Bottom Side Layout
as the threshold. Signals below the threshold are in-
creased, while those above are decreased. This type of
compressor is distinct from other types (such as the lim-
iter discussed below) that only function above or below
the threshold. Linear compressors are typically used in
encode/decode systems such as the companding noise
reduction system described below.
20
2:1 COMPRESSION
20dBV
0dBV
–20dBV
100dB
50dB
–50dBV
–80dBV
INPUT
COMPRESSED
OUTPUT
–20dBV
OUTPUT – dB
0
–20
–40
–60
–80
NO
COMPRESSION
2:1
4:1
10:1
AGC
–100
–100 –80 –60 –40 –20
INPUT – dB
0
20
a.
b.
Figure 7. Linear Compressor Functionality
Figure 7a shows an example of a 2:1 compression ratio.
The compression ratio is defined as the ratio of change
in input level (in dB) to the change in output level. Thus,
for the 2:1 ratio shown, an input signal with 100 dB of
dynamic range is reduced to 50 dB. Figure 7b shows the
transfer function for different compression ratios. As
the ratio increases, the dynamic range of the output de-
creases. A linear compressor with a high ratio is gener-
ally referred to as an AGC circuit (Automatic Gain
Control) where the output level is nearly constant re-
gardless of the input. Notice that all the curves in Figure
7b pass through –20 dBV, which is unity gain. This is
not an arbitrary choice. As explained in the preceding
Figure 5. Topside Layout
Linear Compressor
A compressor is a common audio function to reduce
wide dynamic range signals to a narrower signal range
as shown in Figure 7. Compressing a signal is helpful,
for instance, to prevent low level signals from being
masked by the system noise, such as storing audio on
an analog tape. A linear compressor “rotates” the trans-
fer function around the unity gain point, also referred to
–3–
section, a –20 dBV input to the level detector corre-
sponds to CONOUT = 0 V. With a control voltage of zero
volts, the VCA will have a gain of unity. This unity gain
point can easily be adjusted to any input level as de-
scribed in the following section.
The SSM2120 is programmable for different compres-
sion ratios by simply adjusting one resistor. As ex-
plained above, the level detector has a sensitivity of
3 mV/dB, which is amplified by the control op amp (set
to a gain of 40) to 120 mV/dB. Thus, for every 10 dB rise
in input rms level, the dc voltage at the CONOUT pin
rises by 1.20 V. This voltage can then be scaled and fed
into the VCA’s control port to provide gain or attenua-
tion as shown in Figure 8. The series resistance of R1 +
R3 determines the compression ratio according to the
following formula:
of attenuation. Now all that is left to do is choose R1 +
R3 such that they form a resistor divider with R11 that
results in a 60 mV/2.4 V attenuation ratio. Since R11 is
normally 200
Ω,
R1 + R3 should be 7.8 k
Ω,
which is ex-
actly the result that the above formula gives.
Different compression ratios can be obtained by just
changing the value of R1 + R3. R1 and R3 could actually
be just one resistor; however, they are split in half in or-
der to insert a capacitor for filtering. Thus, R1 and R3
should each be equal to half the sum of the two. Like all
VCAs, the SSM2120 is sensitive to noise on the control
ports, which feeds through, causing excessive noise and
distortion in the audio signal. The capacitor reduces the
noise significantly, preserving the performance of the
SSM2120. The actual value of the capacitor should be as
large as possible without affecting the attack time of the
control signal (i.e., the time constant at 1/(R1 R3
×
C1)
should be less than the attack time).
For applications that require an adjustable compression
ratio, a potentiometer should be inserted in place of the
jumper labeled J6, which is in series with R1 and R3. To
determine the value of the potentiometer and of R1 + R3,
first determine the minimum and maximum compres-
sion ratios desired. Once these compression ratios are
determined, calculate the corresponding resistances ac-
cording to the above formula. R1 + R3 should be set to
the smaller of the two resistance values, which occurs at
the highest compression ratio desired. (For an AGC cir-
cuit with an infinite compression ratio, R1 + R3 = 3.8 k
Ω.)
The potentiometer should then be set to the difference
in the two calculated resistances. For example, a 2:1
compression ratio requires a 7.8 k
Ω
resistor. Thus, the
pot should be at least 7.8 k
Ω–3.8
kΩ = 4.0 k
Ω.
A standard
5 kΩ would easily do the job. The reason for not simply
replacing R1 and R3 with a potentiometer is the filtering.
A capacitor should be placed between the two 1.9 k
Ω
resistors to reduce noise on the VCA’s control port.
Figure 9 shows the actual performance of a compressor
on the evaluation board. The first graph shows the
transfer function for different compression ratios. A few
CR
R1
+
R3
=
R11
20
– 1
CR
– 1
where CR is the compression ratio.
R9
200Ω
5
+V
C
SIGNAL
INPUT
R12
36kΩ
8
C3
2200pF
R13
47Ω
R11
200Ω
J7
SIG
IN
SIG
OUT
4
R6
36kΩ
SIGNAL
OUTPUT
C4
10pF
–V
C
7
SSM2120
1/2
OP275
+15V
J1
R5
100kΩ
J4
+15V
R2
10kΩ
J6
OPTIONAL
SEE TEXT
R17
1kΩ
1
R16 –15V
39kΩ
R7
39kΩ
R14
10kΩ
C2
10µF
9
REC
IN
2V
I
IN
FULL
WAVE
RECTIFIER
V+
I
REF
Q2
THRESH
CON
OUT
3
R1
R3
D1
D2
SSM2120
SHORT
J6
J7
D1
D2
J1
J4
Q1
LOG AV
2
V–
C1
OPEN
J2
J3
J5
C5
10µF
V–
R8
1.5MΩ
OPTIONAL
Figure 8. Linear Compressor Circuitry
An example of setting this compression ratio best illus-
trates the logic behind this formula. Let’s choose a com-
mon compression ratio of 2:1 as an example. In this
case when the input increases by 20 dB, the output
should only increase by 10 dB. To accomplish this, the
control voltage must be sufficient to produce
10 dB of attenuation in the VCA. Because of the
120 mV/dB relationship, a 20 dB increase in the input
results in a 2.4 V increase in the voltage at CONOUT.
Since the control input (–V
C
) has a 6 mV/dB control law,
60 mV should be applied to the –V
C
pin to achieve 10 dB
Figure 9a. Compressor Transfer Function
(V
SY
=
±
15 V, f
IN
= 1 kHz)
–4–
+2.4 V at CONOUT. The two voltages sum and cancel
each other out, leaving CONOUT with zero volts and the
VCA at unity gain. Further adjustment of the potentio-
meter can change the threshold across the entire dy-
namic range of the part. This same technique can also
be used in the expander circuit discussed below.
Automatic Gain Control
A small subsection of the general compressor is an AGC
circuit, where the output has constant amplitude regard-
less of the input. The basic compressor circuit shown in
Figure 8 realizes an AGC circuit with only a couple minor
changes resulting from gain limitations in the VCA. The
first change is to set R1 + R3 to 3.8 k
Ω
according to the
compressor formula. The second change involves prop-
erly setting the threshold control. The maximum usable
gain of the VCA should be limited to 40 dB; however, for
a –80 dBV input and a –20 dBV unity gain point, the re-
quired gain is 60 dB. To only require 40 dB of gain, t he
unity gain point should be lowered to –40 dBV by adjust-
ing the threshold control. At the high end, 60 dB of at-
tenuation is required, which is fine since the SSM2120
has a 100 dB attenuation range. The graph in Figure 10
shows flat response of the entire 100 dB input range.
Notice, however, that the output level is –20 dBV and not
the –40 dBV that the threshold was adjusted to. The ex-
tra 20 dB of gain is realized by increasing the VCA’s out-
put resistor (R6) from 36 k
Ω
to 360 k
Ω.
Figure 9b. Compressor THD + N vs. Frequency (V
SY
=
±
15 V, Compression Ration = 2:1, V
IN
= 0 dBV, with
80 kHz Low-Pass Filter)
characteristics are worth pointing out. The bowing of
the 2:1 and 4:1 curves below –70 dBV is due to
nonlinearities in the VCA control port when trying to re-
alize significant amounts of gain above 20 dB. For the
4:1 compression curve, the transfer function shows
some flattening above +10 dBV, which is due to
nonlinearities for large amounts of attenuation.
The second graph shows the distortion performance of
the VCA with 2:1 compression. In doing this sweep,
ample time must be allowed for proper settling of the
level detector and VCA before the measurement is
made. The distinct rise in distortion below 100 Hz is due
to control feedthrough. Above this frequency, the aver-
aging capacitor (C5) filters the LOGAV voltage resulting
in a dc control signal. However, as the frequency drops
below 100 Hz the capacitor can no longer entirely filter
the signal, resulting in a low frequency, low amplitude
sine wave applied to the control port. Thus, the distor-
tion increases. This can be improved by increasing the
averaging capacitor or the filtering cap (C1) at the ex-
pense of an increased attack time.
This above section has discussed the most general type
of compressor, which is equal compression over the
entire input dynamic range. In practical applications,
many compressors only start compressing the signal
once the input level passes a certain threshold. These
types of circuits are discussed in the “compressor/
limiter” section below.
Adjusting the Unity Gain Point (Threshold)
Looking at the example in Figure 7, the compressor
curves pass through unity gain at –20 dBV. With the ad-
dition of the potentiometer, R5, shown as optional in
Figure 8, this threshold is easily adjusted. The voltage at
the wiper of the potentiometer has a one-to-one corre-
spondence with the voltage at CONOUT. This voltage is
summed with LOGAV to produce the CONOUT voltage.
To increase the unity gain point by 20 dB to 0.0 dBV, the
potentiometer needs to be adjusted to produce a volt-
age of 2.4 V at the wiper. This voltage produces a corre-
sponding –2.4 V at CONOUT. When the input signal
reaches 0 dBV, the level detector develops a voltage of
Figure 10. AGC Transfer Function
(V
SY
=
±
15 V, f
IN
= 1 kHz)
Linear Expander
The complement to a compressor is an expander. In-
stead of reducing the dynamic range of an audio signal,
an expander increases the dynamic range, as the name
implies. Figure 11 illustrates this process. As a continu-
ation of the example above, if the audio signal was com-
pressed by 2:1 and stored on an analog tape, expansion
recreates the original signal with its dynamic range of
100 dB. The actual circuit is identical to that for the com-
pressor except that the +V
C
port is controlled as op-
posed to the –V
C
port as shown in Figure 12. Deriving
the formula for the expander is very similar to the
thought process for the compressor above. For ex-
ample, a 4:1 expansion ratio implies that a
–5–
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