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SLA517T: 产品描述FPGA, 132796 GATES, UUC224, TCP-224; 产品类别可编程逻辑器件可编程逻辑; 文件大小106KB，共12页; 制造商Seiko Epson Corporation

下载文档详细参数选型对比全文预览

SLA517T概述

FPGA, 132796 GATES, UUC224, TCP-224

参数名称	属性值
零件包装代码	DIE
包装说明	DIE,
针数	224
Reach Compliance Code	unknown
其他特性	WITH 2.0V SUPPLY VOLTAGE
CLB-Max的组合延迟	0.14 ns
JESD-30 代码	X-XUUC-N224
等效关口数量	132796
端子数量	224
组织	132796 GATES
封装主体材料	UNSPECIFIED
封装代码	DIE
封装形状	UNSPECIFIED
封装形式	UNCASED CHIP
可编程逻辑类型	FIELD PROGRAMMABLE GATE ARRAY
认证状态	Not Qualified
标称供电电压	3.3 V
表面贴装	YES
技术	CMOS
端子形式	NO LEAD
端子位置	UPPER
Base Number Matches	1

	SLA517T	SLA533Q	SLA5668	SLA581T	SLA5099	SLA509T	SLA502Q	SLA507Q
描述	FPGA, 132796 GATES, UUC224, TCP-224	FPGA, 319065 GATES	FPGA, 267420 GATES	FPGA, 570827 GATES, UUC480, TCP-480	FPGA, 46623 GATES	FPGA, 84318 GATES, UUC168, TCP-168	FPGA, 27274 GATES	FPGA, 71985 GATES
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown	unknown	unknown
其他特性	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE	WITH 2.0V SUPPLY VOLTAGE
CLB-Max的组合延迟	0.14 ns	0.14 ns	0.14 ns	0.14 ns	0.14 ns	0.14 ns	0.14 ns	0.14 ns
等效关口数量	132796	319065	267420	570827	46623	84318	27274	71985
组织	132796 GATES	319065 GATES	267420 GATES	570827 GATES	46623 GATES	84318 GATES	27274 GATES	71985 GATES
可编程逻辑类型	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY	FIELD PROGRAMMABLE GATE ARRAY
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
标称供电电压	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V	3.3 V
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
厂商名称	-	Seiko Epson Corporation	Seiko Epson Corporation	Seiko Epson Corporation	Seiko Epson Corporation	Seiko Epson Corporation	Seiko Epson Corporation	Seiko Epson Corporation