HN58V65A Series
HN58V66A Series
64 k EEPROM (8-kword
×
8-bit)
Ready/Busy Function,
RES
Function (HN58V66A)
REJ03C0149-0300Z
(Previous ADE-203-539B (Z) Rev. 2.0)
Rev. 3.00
Dec. 04. 2003
Description
Renesas Technology
's
HN58V65A series and HN58V66A series are a electrically erasable and
programmable EEPROM’s organized as 8192-word
×
8-bit. They have realized high speed, low power
consumption and high relisbility by employing advanced MNOS memory technology and CMOS process
and circuitry technology. They also have a 64-byte page programming function to make their write
operations faster.
Features
•
Single supply: 2.7 to 5.5 V
•
Access time:
100 ns (max) at 2.7 V
≤
V
CC
< 4.5 V
70 ns (max) at 4.5 V
≤
V
CC
≤
5.5 V
•
Power dissipation:
•
Active: 20 mW/MHz (typ)
•
Standby: 110
µW
(max)
•
On-chip latches: address, data,
CE, OE, WE
•
Automatic byte write: 10 ms (max)
•
Automatic page write (64 bytes): 10 ms (max)
•
Ready/Busy
•
Data
polling and Toggle bit
•
Data protection circuit on power on/off
•
Conforms to JEDEC byte-wide standard
•
Reliable CMOS with MNOS cell technology
Rev.3.00, Dec. 04.2003, page 1 of 26
HN58V65A Series, HN58V66A Series
Features
(cont)
•
10 erase/write cycles (in page mode)
5
•
10 years data retention
•
Software data protection
•
Write protection by
RES
pin (only the HN58V66A series)
•
Industrial versions (Temperatur range:
−20
to 85°C and
−40
to 85°C) are also available.
•
There are also lead free products.
Ordering Information
Access time
Type No.
HN58V65AP-10
HN58V66AP-10
HN58V65AFP-10
HN58V66AFP-10
HN58V65AT-10
HN58V66AT-10
HN58V65AP-10E
HN58V66AP-10E
HN58V65AFP-10E
HN58V66AFP-10E
HN58V65AT-10E
HN58V66AT-10E
2.7 V
≤
V
CC
< 4.5 V
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
100 ns
4.5 V
≤
V
CC
≤
5.5 V
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
70 ns
600 mil 28-pin plastic DIP (DP-28V)
Lead free
400 mil 28-pin plastic SOP (FP-28DV)
Lead free
28-pin plastic TSOP(TFP-28DBV)
Lead free
28-pin plastic TSOP(TFP-28DB)
400 mil 28-pin plastic SOP (FP-28D)
Package
600 mil 28-pin plastic DIP (DP-28)
Rev.3.00, Dec. 04.2003, page 2 of 26
HN58V65A Series, HN58V66A Series
Pin Arrangement
HN58V65AP Series
HN58V65AFP Series
RDY/
Busy
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
RDY/
Busy
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
HN58V66AP Series
HN58V66AFP Series
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
NC
A8
A9
A11
WE
RES
A8
A9
A11
OE
A10
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
CE
I/O7
I/O6
I/O5
I/O4
I/O3
(Top view)
(Top view)
Rev.3.00, Dec. 04.2003, page 3 of 26
HN58V65A Series, HN58V66A Series
Pin Arrangement
(cont)
HN58V65AT Series
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
I/O3
I/O4
I/O5
I/O6
I/O7
A10
15
16
17
18
19
20
21
22
23
24
25
26
27
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A3
A4
A5
A6
A7
A12
RDY/
Busy
V
CC
WE
OE
CE
NC
A8
A9
A11
(Top view)
HN58V66AT Series
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
I/O3
I/O4
I/O5
I/O6
I/O7
A10
15
16
17
18
19
20
21
22
23
24
25
26
27
28
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A3
A4
A5
A6
A7
A12
RDY/
Busy
V
CC
WE
RES
A8
A9
A11
CE
OE
(Top view)
Rev.3.00, Dec. 04.2003, page 4 of 26
HN58V65A Series, HN58V66A Series
Pin Description
Pin name
A0 to A12
I/O0 to I/O7
OE
CE
WE
V
CC
V
SS
RDY/Busy
RES*
NC
Note:
1
Function
Address input
Data input/output
Output enable
Chip enable
Write enable
Power supply
Ground
Ready busy
Reset
No connection
1. This function is supported by only the HN58V66A series.
Block Diagram
Note: 1. This function is supported by only the HN58V66A series.
V
CC
V
SS
I/O0
to
High voltage generator
I/O7
RDY/
Busy
RES
*
1
OE
CE
WE
RES
*
1
A0
to
I/O buffer
and
input latch
Control logic and timing
Y decoder
Y gating
A5
Address
buffer and
latch
A6
to
X decoder
Memory array
A12
Data latch
Rev.3.00, Dec. 04.2003, page 5 of 26
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