RJK0362DSP
Silicon N Channel Power MOS FET
Power Switching
REJ03G1653-0501
Rev.5.01
Apr 24, 2008
Features
Capable of 5 V gate drive
Low drive current
High density mounting
Low on-resistance
R
DS(on)
= 5.0 m
Ω
typ. (at V
GS
= 10 V)
•
Pb-free
•
•
•
•
Outline
RENESAS Package code: PRSP0008DD-D
(Package name: SOP-8<FP-8DAV>)
87
65
5 6 7 8
D D D D
3
12
4
4
G
1, 2, 3
Source
4
Gate
5, 6, 7, 8 Drain
S S S
1 2 3
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel to ambient thermal impedance
Channel temperature
Storage temperature
Symbol
V
DSS
V
GSS
I
D
I
D(pulse)
I
DR
Note1
Ratings
30
±20
16
128
16
15
22.5
2.0
62.5
150
–55 to +150
Unit
V
V
A
A
A
A
mJ
W
°C/W
°C
°C
I
AP Note 2
E
AR Note 2
Pch
Note3
θch-a
Note3
Tch
Tstg
Notes: 1. PW
≤
10
µs,
duty cycle
≤
1%
2. Value at Tch = 25°C, Rg
≥
50
Ω
3. When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW
≤
10s
REJ03G1653-0501 Rev.5.01 Apr 24, 2008
Page 1 of 6
RJK0362DSP
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Gate to source charge
Gate to drain charge
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body–drain diode forward voltage
Body–drain diode reverse recovery
time
Notes: 4. Pulse test
Symbol
V
(BR)DSS
I
GSS
I
DSS
V
GS(off)
R
DS(on)
R
DS(on)
|y
fs
|
Ciss
Coss
Crss
Qg
Qgs
Qgd
t
d(on)
t
r
t
d(off)
t
f
V
DF
t
rr
Min
30
—
—
1.0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
5.0
7.1
25
2700
315
160
20
8
4.5
9
4.4
60
7.5
0.82
20
Max
—
± 0.1
1
2.5
6.5
9.9
—
—
—
—
—
—
—
—
—
—
—
1.07
—
Unit
V
µA
µA
V
mΩ
mΩ
S
pF
pF
pF
nC
nC
nC
ns
ns
ns
ns
V
ns
Test Conditions
I
D
= 10 mA, V
GS
= 0
V
GS
= ±20 V, V
DS
= 0
V
DS
= 30 V, V
GS
= 0
V
DS
= 10 V, I
D
= 1 mA
I
D
= 8 A, V
GS
= 10 V
Note4
I
D
= 8 A, V
GS
= 5 V
Note4
I
D
= 8 A, V
DS
= 10 V
Note4
V
DS
= 10 V
V
GS
= 0
f = 1 MHz
V
DD
= 10 V
V
GS
= 5 V
I
D
= 16 A
V
GS
= 10 V, I
D
= 8 A
V
DD
≅
10 V
R
L
= 1.25
Ω
Rg = 4.7
Ω
I
F
= 16 A, V
GS
= 0
Note4
I
F
= 16 A, V
GS
= 0
di
F
/ dt = 100 A/
µs
REJ03G1653-0501 Rev.5.01 Apr 24, 2008
Page 2 of 6
RJK0362DSP
Main Characteristics
Power vs. Temperature Derating
4.0
Maximum Safe Operation Area
500
Channel Dissipation Pch (W)
3.0
Drain Current I
D
(A)
Test Condition :
When using the glass epoxy board
(FR4 40x40x1.6 mm), PW
≤
10 s
100
DC
10
µ
s
10
Op
PW
era
1m
=1
n(
s
s
10
0
µ
s
2.0
tio
0m
1.0
1 Operation in
this area is
limited by R
DS(on)
0.1
0.01
0.1
Ta = 25°C
1 shot Pulse
0.3
1
PW
N
< 1
ote
0s
4
)
0
50
100
150
200
3
10
30
100
Ambient Temperature Ta (°C)
Drain to Source Voltage V
DS
(V)
Note 5 : When using the glass epoxy board
(FR4 40x40x1.6 mm)
Typical Output Characteristics
20
4.5 V
10 V
Pulse Test
20
Typical Transfer Characteristics
V
DS
= 10 V
Pulse Test
I
D
(A)
12
3.0 V
8
2.8 V
I
D
(A)
Drain Current
16
3.2 V
16
12
Drain Current
8
4
4
V
GS
= 2.6 V
0
2
4
6
8
10
0
Tc = 75°C
25°C
–25°C
1
2
3
4
5
Drain to Source Voltage
V
DS
(V)
Gate to Source Voltage
V
GS
(V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
160
Static Drain to Source on State Resistance
vs. Drain Current
Drain to Source on State Resistance
R
DS (on)
(mΩ)
100
Pulse Test
Drain to Source Saturation Voltage
V
DS (on)
(mV)
Pulse Test
120
30
80
10
V
GS
= 5 V
10 V
I
D
= 10 A
40
5A
2A
3
0
4
8
12
16
20
1
1
3
10
30
100
300 1000
Gate to Source Voltage
V
GS
(V)
Drain Current
I
D
(A)
REJ03G1653-0501 Rev.5.01 Apr 24, 2008
Page 3 of 6
RJK0362DSP
Static Drain to Source on State Resistance
vs. Temperature
20
Pulse Test
10000
3000
Ciss
Static Drain to Source on State Resistance
R
DS (on)
(mΩ)
Typical Capacitance vs.
Drain to Source Voltage
Capacitance C (pF)
16
I
D
= 2 A, 5 A, 10 A
V
GS
= 5 V
1000
300
100
30
10
0
V
GS
= 0
f = 1 MHz
10
20
30
Coss
12
8
Crss
4
0
–25
10 V
2 A, 5 A, 10 A
0
25
50
75
100 125 150
Case Temperature
Tc
(
°
C)
Drain to Source Voltage V
DS
(V)
Reverse Drain Current vs.
Source to Drain Voltage
V
GS
(V)
20
20
Dynamic Input Characteristics
V
DS
(V)
50
Reverse Drain Current I
DR
(A)
I
D
= 16 A
V
GS
16
V
DD
= 25 V
10 V
10 V
16
5V
Pulse Test
40
Drain to Source Voltage
30
V
DS
12
Gate to Source Voltage
12
20
8
8
V
GS
= 0, –5 V
10
V
DD
= 25 V
10 V
0
20
40
60
80
4
4
0
0
100
0
0.4
0.8
1.2
1.6
2.0
Gate Charge
Qg (nc)
Source to Drain Voltage V
SD
(V)
Maximum Avalanche Energy vs.
Channel Temperature Derating
Repetitive Avalanche Energy E
AR
(mJ)
50
I
AP
= 15 A
40
V
DD
= 15 V
duty < 0.1 %
Rg
≥
50
Ω
30
20
10
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
REJ03G1653-0501 Rev.5.01 Apr 24, 2008
Page 4 of 6
RJK0362DSP
Normalized Transient Thermal Impedance vs. Pulse Width
10
Normalized Transient Thermal Impedance
γ
s (t)
1
D=1
0.5
0.1
0.2
0.1
0.01
0.05
0.02
0.01
1s
0.001
h
p
ot
uls
e
θch
- f(t) =
γs
(t) x
θch
- f
θch
- f = 100°C/W, Ta = 25°C
When using the glass epoxy board
(FR4 40 x 40 x 1.6 mm)
PDM
PW
T
D=
PW
T
0.0001
10
µ
100
µ
1m
10 m
100 m
1
10
100
1000
10000
Pulse Width PW (s)
Avalanche Test Circuit
Avalanche Waveform
1
2
L
•
I
AP2
•
V
DSS
V
DSS
– V
DD
V
DS
Monitor
L
E
AR
=
I
AP
Monitor
I
AP
V
(BR)DSS
Rg
D. U. T
V
DD
V
DS
I
D
Vin
15 V
50
Ω
0
V
DD
Switching Time Test Circuit
Vin Monitor
D.U.T.
Rg
Switching Time Waveform
Vout
Monitor
90%
R
L
V
DS
= 10 V
Vin
Vout
10%
10%
10%
Vin
10 V
90%
td(on)
tr
90%
td(off)
tf
REJ03G1653-0501 Rev.5.01 Apr 24, 2008
Page 5 of 6
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