DATA SHEET
MOS INTEGRATED CIRCUIT
μ
PD3734A
2660 PIXELS CCD LINEAR IMAGE SENSOR
DESCRIPTION
The
μ
PD3734A is a high sensitivity CCD (Charge Coupled Device) linear image sensor which changes optical
images to electrical signal.
The
μ
PD3734A has 2660 pixels and an output amplifier which has high gain and wide output range, but low noise.
And it has reset feed-through level clamp circuit, sample and hold circuit and voltage amplifier. Therefore, it is
suitable for image scanners, facsimiles and so on.
FEATURES
•
Valid photocell
•
Photocell’s pitch
•
High sensitivity
•
Peak response wavelength
•
Resolution
•
Power supply
•
Drive clock level
•
High speed scan
•
Built-in circuit
: 2660 pixels
: 11
μ
m
: 70 V/lx•s TYP.
: 550 nm (green)
: 12 dot/mm A4 (210
×297
mm) size (shorter side)
300 dpi US letter (8.5”
×
11”) size (shorter side)
: +12 V
: CMOS output under 5 V operation
: 0.54 ms/line (S/H in used)
: Sample and hold circuit
Reset feed-through level clamp circuit
Clamp pulse generation circuit
Voltage amplifier
•
Low noise
•
Low image lag
: 1 % MAX.
ORDERING INFORMATION
Part Number
Package
CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))
μ
PD3734ACY-A
<R>
Remark
The
μ
PD373ACY-A is a lead-free product.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. S11454EJ3V0DS00 (3rd edition)
Date Published February 2006 NS CP (N)
Printed in Japan
1996
The mark '' <R>" shows major revised points.
The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.
μ
PD3734A
BLOCK DIAGRAM
V
OD
3
AGND 10
φ
RB 21
14
φ
2
V
OUT
17
•
•
•
Voltage Amplifier
S/H circuit
Reset feed-through
level clamp circuit
Optical black (OB) 18 pixels, invalid 2 pixels,
valid photocell 2660 pixels, invalid 2 pixels
9
φ
TG
φ
SHB
2
15
φ
1
4
AGND
2
Data Sheet S11454EJ3V0DS
μ
PD3734A
PIN CONFIGURATION (Top View)
CCD linear image sensor 22-pin plastic DIP (10.16 mm (400))
μ
PD3734ACY-A
No connection
1
NC
NC
22
No connection
Sample and hold clock
2
φ
SHB
V
OD
φ
RB
NC
21
Reset gate clock
Output drain voltage
3
20
No connection
Analog GND
4
AGND
NC
19
No connection
No connection
5
NC
NC
V
OUT
18
No connection
No connection
6
NC
17
Output
No connection
7
NC
NC
16
No connection
No connection
8
NC
φ
1
φ
2
NC
15
Shift register clock 1
Transfer gate clock
9
φ
TG
AGND
14
Shift register clock 2
Analog GND
10
13
No connection
No connection
11
NC
NC
12
No connection
Caution
Connect the No connection pins (NC) to GND.
PHOTOCELL STRUCTURE DIAGRAM
9
μ
m
2
μ
m
11
μ
m
Channel stopper
Aluminum
shield
Data Sheet S11454EJ3V0DS
3
μ
PD3734A
ABSOLUTE MAXIMUM RATINGS (T
A
= +25°C)
Parameter
Output drain voltage
Shift register clock voltage
Reset gate clock voltage
Transfer gate clock voltage
Sample and hold clock voltage
Operating ambient temperature
Note
Symbol
V
OD
V
φ
1
, V
φ
2
V
φ
RB
V
φ
TG
V
φ
SHB
T
A
Ratings
–0.3 to +15
–0.3 to +15
–0.3 to +15
–0.3 to +15
–0.3 to +15
–25 to +60
Unit
V
V
V
V
°C
°C
Note
Use at the condition without dew condensation.
Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any
parameter. That is, the absolute maximum ratings are rated values at which the product is on the
verge of suffering physical damage, and therefore the product must be used under conditions that
ensure that the absolute maximum ratings are not exceeded.
Caution
RECOMMENDED OPERATING CONDITIONS (T
A
= +25°C)
Parameter
Output drain voltage
Shift register clock high level
Shift register clock low level
Reset gate clock high level
Reset gate clock low level
Transfer gate clock high level
Transfer gate clock low level
Sample and hold clock high level
Sample and hold clock low level
Data rate
Symbol
V
OD
V
φ
1H
, V
φ
2H
V
φ
1L
, V
φ
2L
V
φ
RBH
V
φ
RBL
V
φ
TGH
V
φ
TGL
V
φ
SHBH
V
φ
SHBL
f
φ
RB
S/H in used
S/H not in used
Conditions
MIN.
11.4
4.5
–0.3
4.5
–0.3
4.5
–0.3
4.5
–0.3
0.2
0.2
TYP.
12.0
5.0
0
5.0
0
5.0
0
5.0
0
1
1
MAX.
12.6
5.5
+0.5
5.5
+0.5
5.5
+0.5
5.5
+0.5
5
4
Unit
V
V
V
V
V
V
V
V
V
MHz
MHz
4
Data Sheet S11454EJ3V0DS
μ
PD3734A
ELECTRICAL CHARACTERISTICS
T
A
= +25°C, V
OD
= 12 V, f
φ
1
= 0.5 MHz, data rate = 1 MHz, storage time = 10 ms
light source: 3200 K halogen lamp + C-500S (infrared cut filter, t = 1 mm), input signal clock = 5 V
p-p
Parameter
Saturation voltage
Saturation exposure
Photo response non-uniformity
Average dark signal
Dark signal non-uniformity
Power consumption
Output impedance
Response
Response peak
Image lag
Offset level
Output fall delay time
Note
Register imbalance
Total transfer efficiency
Dynamic range
Reset feed-through noise
Sample and hold noise
Bit noise
Random noise
IL
V
OS
t
d
RI
TTE
DR
RFSN
SHSN
BN
σ
MTF
S/H in used
S/H not in used
Resolution
Modulation transfer function at
nyquist frequency
V
OUT
= 500 mV, t1, t2 = 30 ns
V
OUT
= 500 mV
V
OUT
= 1 V, data rate = 4 MHz
V
sat
/DSNU
Light shielding
Light shielding,
V
OUT
= 1 V
Symbol
V
sat
SE
PRNU
ADS
DSNU
P
W
Z
O
R
F
Daylight color fluorescent lamp
Daylight color fluorescent lamp
V
OUT
= 500 mV
Light shielding
Light shielding
Test Conditions
MIN.
1.5
–
–
–
–
–
–
49
–
–
3.5
–
0
92
–
–900
–50
–
–
–
–
TYP.
2.0
0.029
±2
1.0
4
190
0.5
70
550
0.3
4.5
80
–
–
500
–200
0
4.5
0.9
0.9
65
MAX.
–
–
±8
3.0
6
250
1
91
–
1.0
5.5
–
3
–
–
+500
+50
–
–
–
–
Unit
V
lx•s
%
mV
mV
mW
kΩ
V/Ix•s
nm
%
V
ns
%
%
times
mV
mV
mV
p-p
mV
mV
%
φ
SHB series resistor 47
Ω
Note
Refer to
TIMING CHART2.
Data Sheet S11454EJ3V0DS
5