RD74LVC74B
Dual D-type Flip Flops with Preset and Clear
REJ03D0324–0100Z
Rev.1.00
Jun. 22, 2004
Description
The RD74LVC74B has independent data, preset, clear, and clock inputs Q and
Q
outputs in a 14 pin package. The
logic level present at the data input is transferred to the output during the positive going transition of the clock pulse.
Preset and clear are independent of the clock and accomplished by a low level at the appropriate input. Low voltage
and high-speed operation is suitable at the battery drive product (note type personal computer) and low power
consumption extends the life of a battery for long time operation.
Features
V
CC
= 1.65 V to 5.5 V
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
Typical V
OL
ground bounce < 0.8 V (@V
CC
= 3.3 V, Ta = 25°C)
Typical V
OH
undershoot > 2.0 V (@V
CC
= 3.3 V, Ta = 25°C)
High output current ±4 mA (@V
CC
= 1.65 V)
±8 mA (@V
CC
= 2.3 V)
±12 mA (@V
CC
= 2.7 V)
±24 mA (@V
CC
= 3.0 V to 5.5 V)
•
Ordering Information
Part Name
RD74LVC74BFPEL
RD74LVC74BTELL
Package Type
SOP–14 pin (JEITA)
TSSOP–14 pin
Package Code
FP–14DAV
TTP–14DV
FP
T
Package
Abbreviation
Taping Abbreviation
(Quantity)
EL (2,000 pcs / reel)
ELL (2,000 pcs / reel)
•
•
•
•
•
Function Table
Inputs
PR
L
H
L
H
H
H
H
H
H:
L:
X:
↓
:
↑
:
Q
0
:
Note:
H
L
L
H
H
H
H
H
CLR
X
X
X
↑
↑
L
H
↓
CK
X
X
X
H
L
X
X
X
D
H
L
H
*1
H
L
Q
0
Q
0
Q
0
Q
L
H
H
*1
L
H
Q
0
Q
0
Q
0
Outputs
Q
High level
Low level
Immaterial
High to Low transition
Low to high transition
Level to Q before the indicated steady input conditions were established.
1. Q and
Q
will remain high as long as preset and clear are low, but Q and
Q
are unpredictable, if preset and
clear go high simultaneously.
Rev.1.00 Jun. 22, 2004 page 1 of 8
RD74LVC74B
Pin Arrangement
1CLR 1
1D 2
1CK 3
1PR 4
1Q 5
1Q 6
GND 7
D
CK
CK
D
PR CLR
Q
Q
14 V
CC
13 2CLR
12 2D
11 2CK
10 2PR
9 2Q
8 2Q
CLR PR
Q
Q
(Top view)
Absolute Maximum Ratings
Item
Supply voltage
Input diode current
Input voltage
Output diode current
Output voltage
Output current
V
CC
, GND current / pin
Storage temperature
Symbol
V
CC
I
IK
V
I
I
OK
V
O
I
O
I
CC
or I
GND
Tstg
–0.5 to 7.0
–50
–0.5 to 7.0
–50
50
–0.5 to V
CC
+0.5
±50
100
–65 to +150
V
mA
mA
°C
Ratings
V
mA
V
mA
V
O
= –0.5 V
V
O
= V
CC
+0.5 V
V
I
= –0.5 V
Unit
Conditions
Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of
which may be realized at the same time.
Rev.1.00 Jun. 22, 2004 page 2 of 8
RD74LVC74B
Recommended Operating Conditions
Item
Supply voltage
Input / output voltage
Operating temperature
Output current
Symbol
V
CC
V
I
V
O
Ta
I
OH
Ratings
1.5 to 5.5
1.65 to 5.5
0 to 5.5
0 to V
CC
–40 to 85
–4
–8
–12
–24
I
OL
4
8
12
24
Input rise / fall time
*1
Unit
V
V
°C
mA
Conditions
Data retention
At operation
PR, CLR, CK, D
Q,
Q
V
CC
= 1.65 V
V
CC
= 2.3 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 5.5 V
mA
V
CC
= 1.65 V
V
CC
= 2.3 V
V
CC
= 2.7 V
V
CC
= 3.0 V to 5.5 V
t
r
, t
f
20
10
ns/V
V
CC
= 1.65 V to 2.7 V
V
CC
= 3.0 V to 5.5 V
Notes: 1. This item guarantees maximum limit when one input switches.
Waveform: Refer to test circuit of switching characteristics.
Rev.1.00 Jun. 22, 2004 page 3 of 8
RD74LVC74B
Electrical Characteristics
Ta = –40 to 85°C
Item
Input voltage
Symbol
V
IH
V
CC
(V)
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
V
IL
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
4.5 to 5.5
Output voltage
V
OH
1.65 to 5.5
1.65
2.3
2.7
3.0
3.0
4.5
V
OL
1.65 to 5.5
1.65
2.3
2.7
3.0
4.5
Input current
I
IN
0 to 5.5
2.7 to 3.6
2.7 to 5.5
∆I
CC
2.7 to 3.6
Quiescent supply current I
CC
1.7
2.0
V
CC
×0.7
—
—
—
—
V
CC
–0.2
1.2
1.7
2.2
2.4
2.2
3.8
—
—
—
—
—
—
—
—
—
—
Min
V
CC
×0.65
—
—
—
—
V
CC
×0.35
V
0.7
0.8
V
CC
×0.3
—
—
—
—
—
—
—
0.2
0.45
0.7
0.4
0.55
0.55
±5.0
±5.0
5.0
500
µA
µA
µA
V
IN
= 5.5 V or GND
V
IN
= 3.6 V to 5.5 V
V
IN
= V
CC
or GND
V
IN
= one input at (V
CC
–0.6)V,
other inputs at V
CC
or GND
V
I
OL
= 100 µA
I
OL
= 4 mA
I
OL
= 8 mA
I
OL
= 12 mA
I
OL
= 24 mA
I
OH
= –24 mA
V
I
OH
= –100 µA
I
OH
= –4 mA
I
OH
= –8 mA
I
OH
= –12 mA
Max
V
Unit
Test Conditions
Rev.1.00 Jun. 22, 2004 page 4 of 8
RD74LVC74B
Switching Characteristics
Item
Maximum clock frequency
Symbol
f
max
V
CC
(V)
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
1.8±0.15
2.5±0.2
2.7
3.3±0.3
5.0±0.5
3.3
Ta = –40 to 85°C
Min
Typ
Max
—
—
83
—
—
83
—
—
150
—
—
150
—
—
150
1.0
—
13.4
1.0
—
7.1
1.0
—
6.0
1.0
—
5.2
1.0
—
4.1
1.0
—
14.4
1.0
—
7.7
1.0
—
6.0
1.0
—
5.2
1.0
—
4.4
1.0
—
12.9
1.0
—
7.0
1.0
—
6.0
1.0
—
5.4
1.0
—
4.1
3.6
—
—
2.3
—
—
3.4
—
—
3.0
—
—
3.0
—
—
2.7
—
—
1.9
—
—
2.2
—
—
2.0
—
—
2.0
—
—
1.0
—
—
1.0
—
—
1.0
—
—
0.0
—
—
0.0
—
—
4.1
—
—
3.3
—
—
3.3
—
—
3.3
—
—
3.3
—
—
—
—
—
—
—
—
—
—
—
—
—
1.0
—
—
1.0
—
4.0
—
Unit
MHz
From (Input) To (Output)
Propagation delay time
t
PLH
t
PHL
ns
CK
Q
t
PLH
t
PHL
ns
CK
Q
t
PLH
t
PHL
ns
PR or CLR
Q,
Q
Setup time
t
su
ns
Data
t
su
ns
PR or CLR
Hold time
t
h
ns
Pulse width
t
w
ns
CK, PR, CLR
Output skew between
pins*
1
t
OSLH
t
OSHL
ns
Input capacitance
Note:
C
IN
pF
1. This parameter is characterized but not tested.
t
OSLH
= |t
PLHm
– t
PLHn
|, t
OSHL
= |t
PHLm
– t
PHLn
|
Rev.1.00 Jun. 22, 2004 page 5 of 8
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