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SMFL2815D/KR

产品描述Analog Circuit,
产品类别模拟混合信号IC    信号电路   
文件大小484KB,共13页
制造商Signal Technology Corp California Operations
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SMFL2815D/KR概述

Analog Circuit,

SMFL2815D/KR规格参数

参数名称属性值
包装说明,
Reach Compliance Codeunknown
Base Number Matches1

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Crane Aerospace & Electronics Power Solutions
sMFL single and dual dc/dc converters
28 VoLt input – 65 Watt
Features
Fully qualified to Class H or K
–55° to +125°C operation
16 to 40 VDC input
Fully Isolated
Magnetic feedback
Fixed frequency, 600 kHz typical
Topology – Single Ended Forward
Inhibit input side and output side
Sync function
50 V for up to 120 ms transient protection
VDc O
utPut
SINgLE
3.3
5
12
15
DUAL
±5
±12
±15
MODELS
Output trim on single output models
Indefinite short circuit protection
Up to 85% efficiency / 43 W/in
3
Parallelable up to 148 watts
Remote sense on single output models
description
The SMFL Series™ 28-volt DC/DC converters are rated up to 65 watts
output power over a -55° to +125°C temperature range with a 28 Vdc
nominal input. On dual output models up to 70% of the rated output
power can be drawn from either the positive or negative outputs. Current
sharing allows the units to be paralleled for total power of up to 148
watts. The welded, hermetically sealed package is only 3.0 x 1.5 x 0.40
inches, giving the series an overall power density of up to 45 watts per
cubic inch.
i
nhibit
S
creening
SMFL converters offer the following screening options: Space Prototype
(O), Class H, or Class K. Radiation tolerant to Radiation Hardness
Assurance (RHA) levels of “-” (O) or “R”, per MIL-STD-38534. Interpoint
model numbers use an “O” in the RHA designator position to indicate the
“-” (dash) Radiation Hardness Assurance level of MIL-PRF-38534, which
is defined as “no RHA”. See “Class H and K, QML Screening” tables for
more information.
The SMFL Series converters have two TTL compatible inhibit terminals
(INH1 and INH2) that can be used to disable power conversion, resulting
in a very low quiescent input current and no generation of switching
noise. An open collector TTL compatible low (<0.8 volts) is required to
inhibit the converter between INH1 (pin 4) and Input Common (pin 2). An
open collector TTL compatible low (<0.5 volts) is required to inhibit the
converter between INH2 (pin 12) and Output Common (pin 8). The appli-
cation of intermediate voltages to these pins (1.5 to 10.5 volts) should be
avoided.
S
ync
Converters may be synced to an external clock (525 to 675 kHz) or
to one another by using the sync in or out pins. The nominal free-run
switching frequency is 600 kHz.
D
eSign
F
eatureS
c
urrent anD
P
arallel
O
PeratiOn
SMFL Series converters are switching regulators that use a quasi-square
wave, single ended forward converter design with a constant switching
frequency of 600 kHz typical.
Isolation between input and output circuits is provided with a transformer
in the forward path and a wide bandwidth magnetic coupling in the feed-
back control loop. The SMFL uses a unique dual loop feedback technique
that controls output current with an inner feedback loop and an output
voltage with a cascaded voltage mode feedback loop. The additional
secondary current mode feedback loop improves transient response in
a manner similar to primary current mode control and allows for ease of
paralleling, but without the cost and complexity.
The constant frequency, pulse-width modulated converters use a quasi-
square wave single-ended forward design. Tight load regulation is
achieved through a wide-bandwidth magnetic feedback circuit. The output
voltage on single SMFL models can be trimmed to a specific output
voltage by adding an external resistor.
Multiple single output SMFL converters may be used in parallel to drive a
common load. In this mode of operation the load current is shared by two
or three SMFL converters. In current sharing mode, one SMFL converter
is designated as a master. The SLAVE pin (pin 11) of the master is left
unconnected and the MSTR/INH2 pin (pin 12) of the master is connected
to the SLAVE pin (pin 11) of the slave units. The units designated as
slaves have the MSTR/INH2 pin (pin 12) connected to the SNS RTN
pin (pin 9). Note that synchronizing the units together is not required for
current sharing operation. A second slave unit may be placed in parallel
with a master and slave; this requires the TRI pin (pin 3) of the master
unit to be connected to the SNS RTN pin (pin 9). See Figure 2 for a block
diagram of parallel connections.
When paralleled, 76% of the total combined power ratings of the SMFL
converters are available at the load. Overload and short circuit perfor-
mance are not adversely affected during parallel operation.
Crane Aerospace & Electronics
Electronics group (Interpoint Brand)
PO Box 97005 • Redmond WA 98073-9705
425.882.3100 • electronics@craneae.com
www.craneae.com
Page 1 of 13
Rev H - 20061102

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描述 Analog Circuit, Analog Circuit, Analog Circuit, Analog Circuit, Analog Circuit, Analog Circuit, Analog Circuit,
Reach Compliance Code unknown unknown unknown unknown unknown unknown unknown
厂商名称 - - Signal Technology Corp California Operations Signal Technology Corp California Operations Signal Technology Corp California Operations Signal Technology Corp California Operations Signal Technology Corp California Operations
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