AN-936
How to Use the
NM93C86A Serial
EEPROM as a PC/Laptop
Detachable Printer File
Memory Card (DPFMC)
INTRODUCTION
This applications note describes how to build a DPFMC. The card
will be designed around a COP888CG microcontroller and four
NM93C86A serial EEPROMs. The card will be designed to plug
into any standard IBM-PC/Laptop parallel port. Once the card has
been installed, the user can download any document (text, graphic,
or combination) and print out that document at a later time. The
DPFMC will be designed to make the computer think a printer is
actually connected by simulating the printer’s input port. Once all
documents have been sent, the user needs to press the SEND-
DOC button once to save the pointer address. Next the user can
remove the card and turn its power off. The documents contained
in the card’s EEPROMs can be stored for hours, days, months, or
even years if needed. However, hours will probably be a more
realistic time frame. When the user is ready to print-out the
documents saved, the card can be plugged into a stand along
printer by either using the printer’s DB-25 cable or (with an
appropriate adapter) the printer itself. After switching on the cards
power, all the user has to do is press the SEND DOC button and
the printer will begin to print out the saved documents.
Fairchild
Application Note 936
COP888CG DESCRIPTION
The COP888CG is an 8-bit microcontroller. Its a fully static CMOS
device containing RAM, ROM, and Microwire interface. The
microcontroller contains 4,096 bytes of ROM used to store pro-
gram code and 192 bytes of RAM used to store register data. It
contains an 8-bit input, an 8-bit output, and two 8-bit bi-directional
ports. The microcontroller also has a Microwire interface which will
be used to connect the NM93C86A to it. These attributes make the
COP888CG a good choice for this particular application.
V
CC
CKD
CKI
RESET
L0
L1
L2
L3
6
7
34
17
18
19
20
8
9
10
11
12
13
14
15
I0
I1
I2
I3
I4
I5
I6
I7
D0
D1
D2
D3
D4
D5
D6
D7
SO
SK
SI
NM93C86A DESCRIPTION
The NM93C86A is a 16,384-bit CMOS non-volatile serial EEPROM
that can be configured to have a 1024 x 16 or a 2048 x 8
architecture. The configuration is determined by the state of the
ORG pin. If the ORG pin is tied low the NM93C86A is configured
as a 2048-byte-wide memory. If the ORG pin is left floating or tied
to V
CC
, the 1024 word wide configuration is enabled. An internal
pull-up resistor to V
CC
assures that a floating ORG pin is pulled
high. Figure 1 shows the NM93C86A pin arrangement.
L5
L6
L7
C0
C1
C2
22
23
24
39
40
1
2
35
36
37
38
COP888CG
33
V
SS
L4
21
16
25
26
27
28
29
30
31
32
3
4
5
CS
SK
DI
DO
1
2
3
4
8
V
CC
NC
ORG
V
SS
NM93C86A
C3
G0
G1
G2
G3
7
6
5
FIGURE 1. NM93C86A Pin Out
The NM93C86A has 7 instructions that can be performed. The
instructions are: Read a byte/word (READ), Enable programming
(EWEN), Disable programming (EWDS), Erase a byte/word
(ERASE), Write a byte/word (WRITE), Erase all bytes/words
(ERAL), and write a data pattern to all bytes/words (WALL). The
NM93C86A uses the industry standard MICROWIRE™ interface.
FIGURE 2. COP888CG Microcontroller
CIRCUIT DESCRIPTION
Figure 3 shows the complete schematic diagram of the DPFMC.
The L-port of the microcontroller is connected to the D0–D7 data
lines of the computer’s bidirectional data port. The LS-nibble of C-
port is connected to the STROBE, ACKNLG, BUSY, and the PE
pins of the computer’s parallel
© 1998 Fairchild Semiconductor Corporation
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AN-936
port. Pin 13 is tied HIGH and all of the other pins are tied LOW. All
of the bi-directional I/O lines are pulled HIGH through two 10 kΩ
SIP resistors.
The MICROWIRE Interface of the COP888CG uses pins 3(SO),
4(SK), and 5(SI). These pins are connect to the equivalent pins of
the EEPROM. The MS-nibble of the D-port is used as chip select
outputs to the four EEPROMs. Since the data the DPFMC will be
processing is 1-byte length data, the NM93C86A will be config-
ured to deal with 8-bit chunks instead of 16-bit chunks of data.
+5V
R
C1
SP1
C2
XT4
X1
R2
1
2
3
4
5
6
7
8
9
10
11
12
13
8
5
7
34
17
18
19
20
21
22
23
24
39
40
1
2
35
36
37
38
CK0
CK1
RFSFT
L0
L1
L2
L3
L4
L5
L6
L7
C0
C1
C2
C3
G0
G1
G2
G3
V
SS
0
1
2
13
4
3
15
17
O0
O1
O2
O3
O4
O5
O6
O7
SO
SK
SI
U1
9
10
11
12
13
14
15
16
25
26
27
28
29
30
31
32
3
4
5
U2
NM93C86A
V
SS
33
1
CS
2
SK
3
DI
4
DO
8
V
CC
7
NC
6
ORG
5
V
SS
1
CS
2
SK
3
DI
4
DO
U2
NM93C86A
8
V
CC
7
NC
6
ORG
5
V
SS
1
CS
2
SK
3
DI
4
DO
R5
C3
+5V
SW1
SW2
SW3
+5V
14
15
16
17
18
19
20
21
22
23
24
25
R3
D1
R4
D2
U2
NM93C86A
8
V
CC
7
NC
6
ORG
5
V
SS
1
CS
2
SK
3
DI
4
DO
U2
NM93C86A
8
V
CC
7
NC
6
ORG
5
V
SS
SIP2
-5V
C4
C1 = 10
µF
C2 = 47 pF
C3 = 47 pF
C4 = 0.1
µF
R1 = 10 kΩ
R2 = 1 MΩ
R3 = 330Ω
R4 = 330Ω
R5 = 10 kΩ
SIP1 = 10 kΩ
SIP2 = 10 kΩ
XTAL = 10 MHz
D1 and D2 = LED’s
FIGURE 3. DPFMC Schematic
The DPFMC will have three inputs. Two are tied HIGH through 10
kΩ resistors. The third is tied LOW. The first input when LOW (pin
9) will indicate RECEIVE MODE. A LOW on the second input (pin
10) will indicate WRITE MODE. A HIGH on the third input (pin 11)
will tell the microcontroller to save the current pointer address and
begin sending the document data to the printer.
Their are also two LED outputs. LED1 will inform the user that the
DPFMC cannot accept any more data. LED1 also informs the user
that the pointer address has been saved. If LED1 flashes continu-
ously the DPFMC is out of memory. If LED1 flashes irregular the
DPFMC has saved the pointer address and is ready for power to
be removed. LED2 informs the user of the current mode. Two
flashes indicates the READ MODE and one flash indicates the
WRITE MODE.
SOFTWARE DESCRIPTION
For simplicity and structure the software part of this application will
be divided into three parts. The first or main block will monitor the
three inputs and decide which mode the DPFMC will enter. The
second block will control the interface logic between the computer’s
parallel port and the DPFMC.
In the case of a read operation, this block of code will start by
configuring the STROBE and BUSY pins as inputs and the
ACKNLG pin as an output. The routine then waits for the BUSY pin
to fall LOW. When the BUSY pin falls low, the routine will begin
monitoring the STROBE pin for a 0.5
µs
LOW. When this happens,
the routine reads the data port and stores that data into accumu-
lator A. After the data is safely stored into accumulator A, the
ACKNLG pin will be pulsed
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www.fairchildsemi.com
AN-936
LOW for 5
µs
to inform the computer that the data was received.
Control is now passed to the final routine. This routine takes the
data from ACC A stores the data into the EEPROMs. This routine
basically will control the memory matrix part of the card. After the
data is stored into the EEPROMs, control is passed back to the
interface routine and the loop continues.
The write sequence will be just the opposite. The BUSY and
STROBE pins are first configured to be outputs and the ACKNLG
pin configured to be a input. The routine will then wait for the SEND
DOC input to go low. When this happens the BUSY will go LOW
to indicate the card is about to send a byte to the printer. The
memory matrix routine the then stores the first byte of data into
accumulator A. After that the interface routine sends that data to
the port. The STROBE pin is pulsed LOW for 5
µs.
From this point
on the routine monitors the ACKNLG pin for a 5
µs
LOW.When a
LOW has occurred the routine loops back to the top, fetches the
next byte, and starts a write loop.
3
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AN-936
; ASSEMBLY CODE FOe THE DETACHABLE PRINTER FILE MEMORY CARD (DPFMC)
; By Charles Watts
.INCLD COP888CG.INC
.SECT CODE, ROM, ABS=0
;--------------------INITIALIZE PORT & REGISTER DATA--------------------
DLYL
= 0F0
DLYH
= 0F1
ADDL
= 0F2
ADDH
= 0F3
BYT
= 00
HLD
= 01
STOLO
= 02
STOHI
= 03
STOHLD
= 04
;
START:
LD
PORTD, #00
LD
PORTGC, #030
SBIT MSEL, CNTRL
SBIT SO, CNTRL
LD
PORTLC, #00
LD
PORTCC, #0B
LD
B, #PORTCP
JSR
LAST
;-----------------------------MAIN ROUTINE-----------------------------
MAIN:
LD
A, PORTI
;
IFEQ A, #06
;
JSR
READ
;
IFEQ A, #05
;
JSR
WRITE
;
JP
MAIN
;
;------------------------SUBROUTINES WILL FOLLOW------------------------
READ:
LD
PORTLC, #00
;CONFIGURE PORT
LD
PORTCC, #06
;TO READ MODE
LD
PORTCD, #02
;
JSR
FLSH2
;BLINK LED 2 TIMES
JSR
EWEN
;
LP1:
IFBIT 3, [B]
;
JSR
SAVE
;
IFBIT 0, [B]
;WAIT FOR STROBE TO GO LOW
JP
LP1
;
LD
PORTCD, #06
;BRING BUSY HIGH
LD
A, PORTLP
;READ PORT AND SAVE IN ACCA
X
A, BYT
;
JSR
PUT
;STORE ACCA IN NVM
LD
PORTCD, #04
;PULSE ACKNLG
NOP
;
NOP
;
LD
PORTCD, #06
;
NOP
;
NOP
;
LD
PORTCD, #02
;
JP
LP1
;
;
WRITE:
LD
PORTLC, #0FF
;TO CONFIGURE PORT
LD
PORTCC, #01
;TO WRITE MODE
LD
PORTCD, #01
;
JSR
FLSH1
;
LP2:
IFBIT 3, [B]
;
JP
LP3
;
4
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AN-936
LP3:
JP
IFBIT
JP
JSR
LD
X
NOP
NOP
LD
NOP
NOP
LD
NOP
NOP
JP
LD
X
LD
OR
X
SBIT
IFBIT
JP
LD
X
SBIT
IFBIT
JP
LD
SBIT
RBIT
SBIT
IFBIT
JP
X
X
LD
JSR
LD
IFEQ
JP
RET
LD
IFEQ
JP
RET
LD
IFEQ
JP
RET
LD
X
LD
OR
X
SBIT
IFBIT
JP
LP2
2, [B]
LP3
GET
A, BYT
A, PORTLD
PORTCD, #00
PORTCD, #01
LP3
A, HLD
A, PORTD
A, ADDH
A, #030
A, SIOR
BUSY, PSW
BUSY, PSW
LP4
A, ADDL
A, SIOR
BUSY, PSW
BUSY, PSW
LP5
SIOR, #000
BUSY, PSW
BUSY, PSW
BUSY, PSW
BUSY,MPSW
LP6
A, SIOR
A, BYT
PORTD, #00
COUNT
A, HLD
A, STOHLD
SKIP1
;
A, ADDL
A, STOLO
SKIP2
;
A, ADDH
A, STOHI
ZD
;
A, HLD
A, PORTD
A, ADDH
A, #028
A, SIOR
BUSY, PSW
BUSY, PSW
LP7
;
;WAIT FOR BUSY LOW
;
;GET BYTE FROM
;
;NVM.
;
;
;PULSE STORE
;
;
;
;
;
;
;SET CS HIGH
;
;SEND OPCOCE AND
;HI ADDRESS
;
;
;
;
;SEND LOW ADD
;
;
;
;
;
;RECEIVE BYTE
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
;
GET:
LP4:
LP5:
LP6:
SKIP1:
SKIP2:
;
PUT:
LP7:
;SET CS HIGH
L
;SEND OPPCOCE AND
;HI ADDRESS
;
;
;
;
5
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