A Designers Guide for the HA-5033 Video Buffer
Application Note
November 1996
AN548.1
Introduction
Intersil Corporation is an industry leader in the high speed,
wideband, monolithic operational amplifier market. Due to
the high performance of Intersil products, designers in the
more specialized areas of electronics have shown interest in
utilizing these products in their applications. One such area
is video design. In an effort to address this market, Intersil
has introduced the HA-5033 video buffer.
This paper will discuss the HA-5033 design and provide addi-
tional performance characteristics not shown in the data
sheet.
METAL CAN PACKAGE
TOP VIEW
V+
NC
1
CASE
NC
NC
3
4
5
+IN
NC
6
7
NC
8
2
12
OUT
11
10
9
V-
NC
NC
V+
NC
NC
IN
1
2
3
4
8
7
6
5
OUT
NC
SUB
STRATE
V-
PDIP PSOP
TOP VIEW
HA-5033 Description
The HA-5033 is a unity gain monolithic lC designed for any
application requiring a fast wideband buffer. A voltage
follower by design, this product is optimized for high speed
50Ω and 75Ω coaxial cable driver applications common in
color video systems.
Critical performance characteristics are summarized in
Table 1. Outstanding differential phase/gain characteristics
combined with an output current capability of
±100mA
makes the HA-5033 an excellent choice for the line driver
applications required in video circuit design.
TABLE 1. HA-5033 SPECIFICATIONS: T
A
= 25
o
C;
V
SUPPLY
=
±12V
(UNLESS OTHERWISE SHOWN)
PARAMETER
Input Offset Voltage
Input Bias Current
Differential Phase
Differential Gain
Slew Rate (±15V)
Output Current
Bandwidth (Small Signal)
Bandwidth (V
IN
= 1V
RMS
)
Supply Current
1000
±100
250
65
20
0.1
0.1
MIN
TYP
MAX
15
35
UNITS
mV
µA
Degree
%
V/µs
mA
MHz
MHz
mA
FIGURE 1. HA-5033 PINOUTS: METAL CAN-PIN COMPATIBLE
WITH THE LH0033 HYBRID. 8-LEAD, PDIP-FABRI-
CATED USING A COPPER LEAD FRAME. ADVAN-
TAGES
INCLUDE
EXCELLENT
THERMAL
CHARACTERISTICS AND BOARD SPACE SAVINGS.
The high performance of this product (summarized in
Table 1) is the result of the Intersil High Frequency Dielectric
Isolation Process. A major feature of this process is that it
provides both PNP and NPN high frequency transistors
which make wide bandwidth designs, such as the HA-5033,
practical.
A Closer Look
Most manufacturer's data sheets provide a schematic
diagram and depending upon the complexity of the product,
this schematic may be comprehensive or possibly a
simplified version. Schematics are a visual means of
presenting information, ranging from reliability data, such as
transistor counts, to circuit information for circuit analysis or
computer simulation. But the most important reason for the
schematic is to communicate to the customer the internal
structure of the product and therefore, some insight into its
operation.
At first glance, a schematic may appear as nothing more
than a collection of resistors and transistors. But upon closer
examination, particular areas of operation should become
evident. Using the HA-5033 as an example (Figure 2), it will
be shown that the HA-5033 consists of a signal path, bias
network, and performance optimization circuitry.
Signal buffering is accomplished by cascading two emitter
followers. In order to achieve symmetrical positive and
negative output drive capability, two pairs are paralleled. The
first pair consists of Q
1
and Q
4
for positive drive while the
second pair Q
2
, Q
3
, provide negative drive. The emitter
resistors of Q
1
, Q
2
ensure stability with respect to load resis-
tance, enhance differential phase/gain performance, and
stabilize the quiescent operating point. This signal path has
been highlighted on the schematic.
Other features, which include a minimum slew rate of
1000V/µs, make the HA-5033 useful in high speed A/D
data conversion and sample/hold circuits.
The HA-5033 is offered in three package configurations: the
12 lead metal can, the 8 lead PDIP, and the 8 lead Power
Small Outline Package (PSOP). The pinouts for each pack-
age are illustrated in Figure 1.
1
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Intersil Corporation 1999
Application Note 548
The bias circuitry consists primarily of the diode-biasing
located on the left portion of the schematic along with
transistors Q
5
, Q
6
. This circuitry ensures the designed
performance of the other active elements.
The performance optimization circuits are a slew
enhancement circuit and a bias network buffer circuit. The
transistors Q
7
, Q
8
, Q
9
and Q
10
are for slew enhancement. If
the input voltage exceeds the output by one V
BE
, Q
7
will turn
on Q
10
, which in turn provides extra base drive to Q
1
. Simi-
larly, Q
9
will supply extra base drive to Q
2
.
Transistors Q
11
, Q
12
, Q
13
and Q
14
prevent high frequency
or transient signals from affecting the bias circuitry. This
prevents C
CB
multiplication of current sources Q
5
and Q
6
,
which also improves differential gain/phase performance.
Note that output current limiting was not designed into the
HA-5033. If there is a possibility of the output being shorted
to ground or the supplies, external current limiting will be
necessary.
Any designer interested in using the HA-5033 should be
aware of a characteristic related to output transistor
operation. As the data sheet performance curves
(reproduced in Figure 3) show, the output swing is a function
of frequency. These curves show the point at which observ-
able distortion occurs for a given frequency. However, if the
signal amplitude, signal frequency or both are increased
beyond the curves shown, thermal “runaway” will occur. This
is due to both the NPN and PNP output transistors
approaching a condition of being simultaneously on. This
condition has been computer simulated and the results are
shown in Figure 4.
R
2
Q
11
Q
6
Q
16
BIASING
Q
19
R
6
Q
17
Q
18
R
3
V-
Q
13
Q
5
Q
14
R
1
R
13
Q
9
R
8
Q
4
Q
8
R
10
Q
2
SIGNAL PATH
Q
12
V
IN
Q
3
R
9
Q
7
Q
10
Q
1
R
11
V
OUT
R
12
SLEW
ENHANCEMENT
V+
R
5
Q
15
R
4
FIGURE 2. HA-5033 SCHEMATIC: VIDEO BUFFER DESIGN CONSISTS OF THREE OPERATING AREAS; SIGNAL PATH, BIAS
NETWORK AND PERFORMANCE OPTIMIZATION CIRCUITRY.
6.0
5.5
OUTPUT VOLTAGE (V
RMS
)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
10K
100K
1M
10M
100M
1G
NO HEAT SINK
IN FREE AIR
V
S
=
±15V
OUTPUT VOLTAGE (V
RMS
)
R
L
= 100Ω
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
10K
100K
1M
10M
100M
1G
NO HEAT SINK
IN FREE AIR
V
S
=
±15V
R
L
= 1KΩ
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 3. OUTPUT SWING vs FREQUENCY PERFORMANCE CURVES: CURVES SHOW POINT OF OBSERVABLE DISTORTION FOR
GIVEN FREQUENCY. OPERATION BEYOND THE CURVES SHOWN WILL APPROACH CONDITIONS WHERE OUTPUT
TRANSISTORS ARE SIMULTANEOUSLY ON. THE RESULTING INCREASE IN CHIP TEMPERATURE WILL LEAD TO THER-
MAL RUNAWAY.
2
Application Note 548
OUTPUT NPN ON
OUTPUT PNP ON
6.0
5.0
x10
-2
9.0
x10
-2
BOTH TRANSISTORS ON
CURRENT (A)
CURRENT (A)
6.0
4.0
3.0
2.0
1.0
0.0
x10
-6
1.0
TIME (s)
2.0
3.0
+ SUPPLY CURRENT
- SUPPLY CURRENT
3.0
0.0
0.0
x10
-6
1.0
TIME (s)
2.0
3.0
+ SUPPLY CURRENT
- SUPPLY CURRENT
FIGURE 4A. V
PEAK
= 5V, R
L
= 100
FIGURE 4B. V
PEAK
= 7V, R
L
= 100
FIGURE 4. OUTPUT TRANSISTOR COMPUTER SIMULATION RESULTS
This condition occurs if the frequency of the analog signal
does not allow sufficient time for the output PNP transistor to
turn off. The frequency which causes this “push-push” output
stage can be determined by using the following relationship,
SR
Full Power Bandwidth (FPBW)
= --------------------------
-
2πV
PEAK
T
J
θ
JC
P
DMAX
θ
CS
Where: SR = Slew Rate
V
PEAK
= Analog Signal Peak Voltage
Therefore, the designer can determine the approximate
frequency of thermal runaway by supplying the peak analog
voltage and measuring the buffer slew rate for a particular
application.
For example, the slew rate for the HA-5033 with a load of
R
L
= 1kΩ and C
L
= 1000pF was measured to be 83V/µs.
The FPBW for a 5V
PEAK
analog signal was calculated,
83V/µs
FPBW
= ------------------ =
2.6MHz
-
2π(5V)
T
A
θ
SA
FIGURE 5. THERMAL ANALOG OF OHM’S LAW:
SEMICONDUCTOR/HEAT SINK SYSTEM
In this thermal system, current is replaced by power, voltage
by temperature, and electrical resistance by thermal resis-
tance. By using Figure 5, the following expression is derived,
T
JMAX
–
T
A
-
P
DMAX
= -------------------------------------------
θ
JC
+
θ
CS
+
θ
SA
So the estimated frequency of thermal runaway for the given
conditions is 2.6MHz. Measurements in the lab resulted in a
thermal runaway frequency equal to 2.5MHz.
Although the FPBW relationship gives the designer a
method of estimating the frequency of thermal runaway, it is
recommended that the HA-5033 be operated to the left of
the curves shown in Figure 3. Heat sinking the buffer will not
prevent this condition from occurring.
The purpose of heat sinking a semiconductor is to maintain
the device junction temperature below a specified maximum
limit. This is a thermal problem and can be evaluated using
the thermal analog of Ohm’s Law illustrated in Figure 5.
Where:
P
DMAX
= Power Dissipated (P
DC
+ P
AC
), Watts
T
J
= Maximum Junction Temperature,
o
C
T
A
= Ambient Temperature,
o
C
θ
JC
= Junction to Case Thermal Resistance,
o
C/W
θ
CS
= Case to Heat Sink Thermal Resistance,
o
C/W
θ
SA
= Heat Sink to Ambient Thermal Resistance,
o
C/W
3
This expression allows the designer to determine the
maximum power dissipation of a semiconductor/heat sink
system.
The expression for the semiconductor in free air is,
T
JMAX
–
T
A
P
DMAX
= -------------------------------
-
θ
JA
In order to make use of these expressions, the following
information is required.
θ
JC
and T
JMAX
, from the semicon-
ductor manufacturer and
θ
CS
and
θ
SA
, from the heat sink
manufacturer.
For the HA-5033, the maximum junction temperature
(T
JMAX
) is 175
o
C for the metal can package, and 150
o
C for
the PDIP and PSOP packages. The thermal impedances for
the HA-5033 in the metal can package are
θ
JA
= 65
o
C/W
and
θ
JC
= 34
o
C/W. The PDIP thermal resistance is
θ
JA
= 96
o
C/W, while the PSOP package has
θ
JA
=
129
o
C/W. These values have been used to generate the
“Maximum Power Dissipation” graph in Figure 6.
Recommended heat sinks for the HA-5033 in the metal can
package are the Thermalloy 2240A [1] and IERC-UP-T08-
51CB [2] (base), IERC-UP-C7 (top). Thermal impedances
Application Note 548
are
θ
SA
= 27
o
C/W and
θ
SA
= 10
o
C/W, respectively.
θ
CS
is
dependent upon the type of insulator or thermal joint com-
pound used. Both products are two piece heat sinks, but
differ in design.
By using the given product information and supplying an
operating ambient temperature, the designer can determine
the maximum power the system will dissipate and not
exceed the maximum junction temperature.
For example, Figure 6 shows the maximum power dissipation
for the HA-5033 in a metal can package to be 2.31W at 25
o
C.
MAXIMUM TOTAL POWER DISSIPATION (W)
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
25
45
65
85
TEMPERATURE (
o
C)
105
125
FIRST HALF
OF LINE 263
QUIESCENT P
D
= 0.72W
AT V
S
±12V,
I
CC
= 30mA
PSOP
PDIP
LINE 265,
FIELD 2
LINE 266,
FIELD 2
LINE 264,
FIELD 2
LINE 1,
FIELD 1
LINE 2,
FIELD 1
LINE 3,
FIELD 1
CAN
STARTING
POINT
FIGURE 7A. SEQUENCIAL SCANNING
SECOND HALF OF
OF LINE 263
LINE 262,
FIELD 1
FIGURE 6. HA-5033 MAXIMUM POWER DISSIPATION VS
AMBIENT TEMPERATURE: FREE AIR
FIGURE 7B. INTERLACED SCANNING
FIGURE 7. SCANNING SEQUENCE
The maximum power dissipation of the HA-5033/2240A
metal can/heat sink system is calculated to be,
175
–
25
-
P
DMAX
= --------------------- =
2.46
34
+
27
Therefore, the HA-5033 used with the Thermalloy 2240A
can dissipate 2.46W at 25
o
C and not exceed the maximum
junction temperature of 175
o
C.
The power dissipation limits shown in Figure 6 and those
determined with the heat sink apply for both quiescent and
load related power. Therefore,
P
DMAX
≤
P
DC
+ P
AC
P
DC
= (V+)(+l) + (V-)(-l)
P
AC
= (1/T)
O
∫T
v(t) i(t) dt
Incorporated into present television broadcast standards is a
technique called interlaced scanning. Interlaced scanning
recreates the scene by providing two half scans. As shown in
Figure 7B, the first scan traces out the odd numbered lines,
the second scan fills in the even numbered lines. This
technique avoids the flicker problem and excessive
bandwidths required for similar picture definition using
sequential scanning.
The United States NTSC (National Television Systems
Committee) broadcast standard is a 525 line standard. Each
scan consists of 2621/2 lines. The first scan is known as field
one, the second, field two. Therefore, the complete picture
consists of two fields.
The first 21 lines of each field are blank. Those lines are left
open and are not used to broadcast video information.
Instead, these lines contain other important information,
such as sync pulses, data transmission, and test signals.
The test signals contained in these lines are called the
Vertical Interval Test Signals (VITS) [4, 5], which allows
realtime monitoring of the television broadcast signal quality.
These test signals were used to evaluate the video
performance of the HA-5033.
Four test signals are commonly used in the vertical interval.
They are the multiburst, color bar, composite and vertical
interval reference. These test signals are shown in Figures 8
through 11.
Video Performance
The images which appear on your television picture tube are
created by a process called scanning [3]. Scanning is a
method of recreating the optical image of a scene one line at
a time. Referring to Figure 7A, an electron beam moves or
“scans” from left to right and quickly returns to a position
below its starting spot. This process continues until the
bottom of the picture is reached and the beam returns to the
original top left hand position. This method is called
sequential scanning.
4
Application Note 548
LBAR
(WHITE LEVEL)
0.5MHz
1.0MHz
2.0MHz
3.0MHz
4.2MHz
IRE
100
80
60
40
20
0
COLOR BURST
3.58MHz
IRE
100
YELLOW
CYAN
GREEN
MAGENTA
RED
THREE STEP
MODULATED
PEDESTAL
0
-40
-40
FIGURE 8. MULTIBURST SIGNAL (FIELD 1, LINE 17) ALLOWS
FREQUENCY RESPONSE CHECKS
MOD 12.5 T PULSE
FIGURE 9. COLOR BAR (FIELD 2, LINE 17) ENABLES MONI-
TORING OF COLOR TRANSMISSION QUALITY
LUMINANCE BAR
(WHITE LEVEL)
IRE
120
100
80
60
40
20
0
MODULATED STAIRCASE
2T PULSE
IRE
120
100
80
60
40
20
0
CHROMINANCE
REFERENCE
LUMINANCE
REFERENCE
BLACK
REFERENCE
-40
SYNC
-40
FIGURE 10. COMPOSITE SIGNAL (FIELD 1, AND 2, LINE 18)
DESIGNED FOR GAIN AND TIME DELAY TESTS
FIGURE 11. VERTICAL INTERVAL REFERENCE SIGNAL (FIELD
1 AND 2, LINE 19) PROVIDES COLOR AND GAIN
REFERENCES
+12V
Each test signal was created to allow various distortions to
be measured without interfering with the normal video
transmission. These signal distortions which exist in
television systems are defined as linear or non-linear. Non-
linear distortion, such as differential phase and gain, vary
with the amplitude of the picture signal. Linear distortions,
usually dependent upon frequency response, are indepen-
dent of signal level. For example, the multiburst test signal is
very useful for frequency response checks, whereas the
composite signal contains signals for checking gain error.
Determining the HA-5033’s performance level with respect
to the NTSC standard required the definition of a measure-
ment method. Test equipment was needed that would
produce the necessary NTSC test signals and also monitor
the device under test performance. The test configuration,
shown in Figure 12 consisted of a Tektronix 149A NTSC [6]
generator and Marconi TF 2914A video analyzer [7].
VERTICAL
INTERVAL
TEST SIGNAL
GENERATOR
TEKTRONIX 149A
†
NTSC SIGNAL
GENERATOR
BLUE
BLACK
VIDEO SIGNAL
ANALYZER
MARCONI
TF 2914A
INSERTION
SIGNAL
ANALYZER
HA-5033
75Ω
75Ω
-12V
†
TEKTRONIX 1910 NTSC DIGITAL
GENERATOR RECOMMENDED
FIGURE 12. HA-5033 NTSC PERFORMANCE TEST
CONFIGURATION
The TF 2914A has the capability of measuring 24 separate
video parameters. Other advantages include direct readout
and much more accuracy than possible using scope methods.
Table 2 lists the video parameters tested on the HA-5033
along with the particular VITS utilized by the TF 2914A.
5
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