INTEGRATED CIRCUITS
DATA SHEET
SAA5246A
Integrated VIP and Teletext
(IVT1.0)
Product specification
Supersedes data of August 1992
File under Integrated Circuits, IC02
January 1993
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
FEATURES
•
Complete Teletext decoder in a 48-pin DIL or 64-pin
QFP, integrated circuit
•
Single
+5
V power supply
•
Both video and scan related synchronization modes are
supported
•
RGB interface to standard colour decoder ICs, push-pull
output drive
•
Digital data slicer and display clock phase-locked loop
reduce peripheral components to a minimum
•
Data capture performance similar to SAA5231 (VIP2)
•
Option for up to seven national languages
•
Optional storage of packet 24 in the display memory
•
Separate text and video signal quality detectors,
625/525 video status and language version all readable
via I
2
C-bus
•
Automatic ODD/EVEN output control with override
•
Control of display PLL free-run and rolling header via
I
2
C-bus
•
VCS to SCS mode for stable 525 line status display.
QUICK REFERENCE DATA
SYMBOL
V
DD
I
DD
V
syn
V
vid
f
XTAL
T
amb
supply current
sync amplitude
video amplitude
crystal frequency
operating ambient temperature
PARAMETER
positive supply voltage
−
0.1
0.7
−
−20
MIN.
4.5
64
0.3
1.0
27
−
TYP.
5.0
DESCRIPTION
SAA5246A
The SAA5246A is a single-chip teletext decoder IC for
decoding 625 line base World System Teletext
transmissions. The teletext decoder hardware is based on
the Enhanced Computer Controlled ECCT device
(SAA5243) with some additional features.
The Video Input Processor section of the device uses
mixed analog and digital designs in the data slicer and
clock phase-locked-loop functions. As a result the number
of external components are greatly reduced and no critical
or adjustable components are required.
MAX.
5.5
128
0.6
1.4
−
+70
V
UNIT
mA
V
V
MHz
°C
ORDERING INFORMATION
EXTENDED TYPE
NUMBER
SAA5246AP
SAA5246AGP
Notes
1. SOT240-1; 1996 November 22.
2. SOT319-3; 1996 November 22.
PACKAGE
PINS
48
64
PIN POSITION
DIL
QFP
MATERIAL
plastic
plastic
CODE
SOT240AC3
(1)
SOT319DA3
(2)
January 1993
2
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
Y
handbook, full pagewidth
BLAN
COR RGBREF RGB ODD / EVEN
22
19
20
18
15-17
21
48
WE
DISPLAY
47
MEMORY
INTERFACE
34-
46
A0 - A12
OE
D0 - D7
DATA
SLICER
AND
CLOCK
REGENERATOR
TELETEXT
ACQUISITION
AND
DECODING
26-
33
24
I C-BUS
INTERFACE
DCVBS
1, 6,
10
2
SDA
SCL
23
SAA5246A
ANALOG
TO
DIGITAL
CONVERTER
TIMING
CHAIN
VDD
VSS
25
5,
14
CVBS
OSCOUT
OSCIN
2
3
CRYSTAL
OSCILLATOR
INPUT
CLAMP
AND SYNC
SEPARATOR
DISPLAY
CLOCK
PHASE
LOCKED
LOOP
11
13
12
MLA840
4
7
9
8
OSCGND
BLACK IREF CVBS POL VCR / FFB STTV / LFB
Fig.1 Block diagram for SOT240 (DIL48) package.
January 1993
3
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
PINNING
PIN
SYMBOL
SOT240
OSCOUT
OSCIN
OSCGND
V
SS
BLACK
CVBS
IREF
V
DD
POL
STTV/LFB
VCR/FFB
R
G
B
RGBREF
BLAN
COR
2
3
4
5, 14, 25
7
8
9
1, 6, 10
11
12
13
15
16
17
18
19
20
SOT319
27
28
29
26, 30, 31,
43, 58
35
36
37
25, 32, 38
39
40
42
44
45
47
48
52
53
27 MHz crystal oscillator output
27 MHz crystal oscillator input
0 V crystal oscillator ground
0 V ground
DESCRIPTION
SAA5246A
video black level storage pin, connected to ground via a 100 nF capacitor
composite video input pin. A positive-going 1 V (peak-to-peak) input is
required, connected via a 100 nF capacitor
reference current input pin, connected to ground via a 27 kΩ resistor
+5
V positive supply
STTV/LFB/FFB polarity selection pin
sync to TV output pin/line flyback input pin. Function controlled by an
internal register bit (scan sync mode)
PLL time constant switch/field input pin. Function controlled by an internal
register bit (scan sync mode)
dot rate character output of the RED colour information
dot rate character output of the GREEN colour information
dot rate character output of the BLUE colour information
input DC voltage to define the output high level on the RGB pins
dot rate fast blanking output
programmable output to provide contrast reduction of the TV picture for
mixed text and picture displays or when viewing newsflash/subtitle pages.
Open-drain output
a 25 Hz output synchronized to the input CVBS field sync pulses to make a
non-interlaced display by adjustment of the vertical deflection currents.
dot rate character output of teletext foreground colour information.
Open-drain output
serial clock input for I
2
C-bus. It can still be driven HIGH during power-down
of the device
serial data port for the I
2
C-bus. Open drain output. It can still be driven
HIGH during power-down of the device
data ports for the page SRAM
not connected
ODD/EVEN
Y
SCL
SDA
D0-D5
n.c.
21
22
23
24
26-31
−
54
55
56
57
60-64, 3
1, 2, 10, 11,
15, 18, 33,
34, 41, 46,
49 - 51, 59
4, 5
D6-D7
32, 33
data ports for the page SRAM
January 1993
4
Philips Semiconductors
Product specification
Integrated VIP and Teletext (IVT1.0)
SAA5246A
PIN
SYMBOL
SOT240
A0-A12
34-46
SOT319
6-9, 12-14,
16, 17,
19-22
23
24
address output for the page SRAM
DESCRIPTION
OE
WE
47
48
output enable for the page SRAM
write enable for the page SRAM
January 1993
5
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