FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals
February 2008
FMS6403
Triple Video Drivers with Selectable HD/PS/SD
Bypass Filters for RGB and YPbPr Signals
Features
Three Video Anti-aliasing or Reconstruction Filters
2:1 MUX Inputs for YPbPr and RGB Inputs
Supports D1, D2, D3, and D4 Video D-connector
(EIAJ CP-4120)
Selectable 8MHz/15MHz/30MHz 6th-order Filters,
Plus Bypass
Works with SD (480i), Progressive (480p), and HD
(1080i/ 720p)
AC-coupled Inputs Include DC Restore / Bias
Circuitry
All Outputs Can Drive AC- or DC-Coupled
75Ω Loads and Provide Either 0dB or 6dB of Gain
0.40% Differential Gain, 0.25° Differential Phase
TSSOP-20 Packaging
Description
The FMS6403 offers comprehensive filtering for TV,
set-top box, or DVD applications. This part consists of a
triple, sixth-order filter with selectable 30MHz, 15MHz,
or 8MHz cutoff frequency. The filters may also be
bypassed so that the bandwidth is limited only by the
output amplifiers.
A 2:1 multiplexer is provided on each filter channel. The
triple filters are intended for YPbPr and RGB signals.
The DC clamp levels are set according to the RGB_SEL
control input. YPbPr sync tips are clamped to 250mV,
1.125V, and 1.125V, respectively; while RGB sync tips
are all clamped to 250mV. Sync clamp timing can be
derived from the Y/G inputs or from the external
SYNC_IN pin. The 8MHz and 15MHz filter settings
support bi-level sync, while the 30MHz filter setting and
bypass mode support tri-level sync.
All channels nominally accept AC-coupled 1V
PP
signals.
Selectable 0dB or 6dB gain allows the outputs to drive
1V
PP
or 2V
PP
signals into AC- or DC-coupled terminated
loads with a 1V
PP
input. Input signals cannot exceed
1.5V
PP
and outputs cannot exceed 2.5V
PP
.
Applications
Progressive Scan
Cable Set-top Boxes
Home Theaters
Satellite Set-top Boxes
DVD Players
HDTV
Personal Video Recorders (PVR)
Video On Demand (VOD)
Ordering Information
Part Number
FSM6403MTC
FSM6403MTC20X
Operating
Temperature
Range
0 to 70°C
0 to 70°C
Package
20-Lead, Thin Shrink Small Outline Package
(TSSOP)
20-Lead, Thin Shrink Small Outline Package
(TSSOP)
Packing Method
94 Units in Tubes
2500 Unit Tape and
Reel
All packages are lead free per JEDEC: J-STD-020B standard.
© 2005 Fairchild Semiconductor Corporation
FMS6403 • Rev. 1.0.4
www.fairchildsemi.com
FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals
Functional Block Diagram
Figure 1. Block Diagram
Typical Application
Figure 2. Typical Application Circuit
© 2005 Fairchild Semiconductor Corporation
FMS6403 • Rev. 1.0.4
www.fairchildsemi.com
2
FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals
Pin Configuration
Figure 3. Pin Configuration
Pin Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Name
EXT_SYNC
RGB_SEL
Y1/G1
Y2/G2
Pb1/B1
Pb2/B2
Pr1/R1
Pr2/R2
F
SEL0
F
SEL1
GND
GND
0dB_SEL
Pr/R
OUT
Pb/B
OUT
Y/G
OUT
In2_SEL
SYNC_IN
V
CC
V
CC
Type
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Input
Input
Input
Input
Description
Selects the external SYNC_IN signal when set to logic 1; do not float.
Selects RGB clamp levels when set to logic 1. YPbPr clamps levels when set to
logic 0; do not float.
Y or G input 1 - may be connected to a signal that includes sync.
Y or G input 2 - may be connected to a signal that includes sync.
Pb or B input 1.
Pb or B input 2.
Pr or R input 1.
Pr or R input 2.
Selects filter corner frequency or bypass, see Table 2. Do not float.
Selects filter corner frequency or bypass, see Table 2. Do not float.
Must be tied to ground, do not float.
Must be tired to ground, do not float.
Selects output gain of 0dB when set to logic 1; 6dB when set to logic 0. Do not
float.
Pr or R output.
Pb or B output.
Y or G output.
Selects MUX input 2 when set to logic 1; MUX input 1 when set to logic 0. Do not
float.
External sync inputs signal, square wave crossing V
IL
and V
IN
input thresholds. Do
not float.
+5V supply. Do not float.
+5V supply. Do not float.
© 2005 Fairchild Semiconductor Corporation
FMS6403 • Rev. 1.0.4
www.fairchildsemi.com
3
FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IO
I
OUT
DC Supply Voltage
Analog and Digital I/O
Parameter
Min.
-0.3
-0.3
Max.
+6.6
V
CC
+ 0.3
60
Unit
V
V
mA
Output Current, Any One Channel, Do Not Exceed
Note:
1. Functional operation under any of these conditions is not implied.
Reliability Information
Symbol
T
J
T
STG
T
L
Θ
JA
Junction Temperature
Storage Temperature Range
Lead Temperature, Soldering 10 seconds
Thermal Resistance, JEDEC Standard Multi-layer Test
Boards, Still Air
74
-65
Parameter
Min.
Typ.
Max.
+150
+150
+300
Unit
°C
°C
°C
°C/W
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
T
A
V
CC
R
SOURCE
V
CC
Range
Parameter
Operating Temperature Range
Input Source Resistance
Min.
0
4.75
Typ.
5.00
Max.
70
5.25
150
Unit
°C
V
Ω
© 2005 Fairchild Semiconductor Corporation
FMS6403 • Rev. 1.0.4
www.fairchildsemi.com
4
FMS6403 — Triple Video Drivers with Selectable HD/PS/SD Bypass Filters for RGB and YPbPr Signals
DC Electrical Specifications
T
A
=25°C, V
I
=1V
PP
, V
CC
=5.0V; all inputs AC coupled with 0.1µF; all outputs AC coupled into 150Ω; referenced to
400kHz; unless otherwise noted.
Symbol
I
CC
V
I
V
IL
V
IH
V
CLAMP1
V
CLAMP2
PSRR
Parameter
Supply Current
(2)
Conditions
V
CC
, no load
F
SELO
, F
SEL1
, RGB_SEL, 0dB_SEL,
EXT_SYNC, IN2_SEL, SYNC_IN
F
SELO
, F
SEL1
, RGB_SEL, 0dB_SEL,
EXT_SYNC, IN2_SEL, SYNC_IN
R,G,B,Y
Pb and Pr
DC, All Channels
Min.
Typ.
90
1.5
Max.
130
Units
mA
V
PP
Input Voltage Maximum
Digital Input Low
(2)
0
2.4
250
1.125
-40
0.8
V
CC
V
V
mV
V
dB
Digital Input High
(2)
Output Clamp Voltage
Output Clamp Voltage
Power Supply Rejection Ratio
Note:
2. 100% tested at 25°C.
Standard-Definition Electrical Specifications
T
A
=25°C, V
I
=1V
PP
, V
CC
=5.0V, F
SEL0
=0, F
SEL1
=0, 0dB_SEL=0 (gain=6dB), R
SOURCE
=37.5Ω; all inputs AC coupled with
0.1µF; all outputs AC coupled with 220µF into 150Ω referenced to 400kHz; unless otherwise noted.
Symbol
AV
SD
f
1dBSD
f
CSD
f
SBSD
dG
dφ
THD
X
TALK
IN
MUXISO
SNR
t
pdSD
T1
T2
Parameter
SD Gain, 0dB_SEL=0
SD Gain, 0dB_SEL=1
(3)
(3)
Conditions
All Channels, SD Mode
All Channels
All Channels
All Channels at f=27MHz
All Channels
All Channels
V
OUT
=1.8V
PP
at 1MHz
At 1.0MHz
At 1.0MHz
All Channels, NTC-7 Weighting,
4.2MHz Lowpass, 100Khz Highpass
Delay from Input to Output at
4.5MHz
Min.
5.6
-0.4
5.5
Typ.
6.0
0
7.6
8.5
Max.
6.4
0.4
Units
dB
MHz
MHz
dB
%
°
%
dB
dB
dB
ns
ns
µs
-1dB Bandwidth for SD
-3dB Bandwidth for SD
Attenuation: SD (Stop-band
(3)
Rejection)
Differential Gain
Differential Phase
Output Distortion,
All Channels
Crosstalk, Channel-to-channel
INMUX Isolation
Signal-to-Noise Ratio
Propagation Delay for SD
SYNC to SYNC_IN Delay
SYNC_IN Minimum Pulse
Width
40
56
0.40
0.25
0.4
-68
-70
74
80
10
4
Note:
3. 100% tested at 25°C.
© 2005 Fairchild Semiconductor Corporation
FMS6403 • Rev. 1.0.4
www.fairchildsemi.com
5
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