Product Data Sheet
FX-500
Low Jitter Frequency Translator
Features
• Complete Frequency Translator to 77.760 MHz
• 3.3 Volt or 5.0 Volt Supply
• Capable of locking to an 8 kHz pulse/ BITS clock
• Tri-State Output allows board test
• Lock Detect
• J-Lead Ceramic Package
• Advanced Custom ASIC Technology
• Absolute Pull Range Performance to ±100 ppm
• CMOS Output
• Commercial or Industrial Temperature Range
• EIA Compatible Tape and Reel Packaging
Description
The FX-500 is a complete crystal-based frequency
translator used in communications applications
where low jitter is paramount.
Performance advantages include superior jitter per-
formance, high output frequencies and small pack-
age size. Advanced custom ASIC technology
results in a highly robust, reliable and predictable
device.
The device is packaged in a 6 pin J-Lead ceramic
package with a hermetic seam welded lid.
Applications
•
•
•
•
•
Frequency Translation, Clock Smoothing
Telecom - SONET/SDH/ATM/DWDM
Datacom - DSLAM, DSLAR, Access Nodes
Cable Modem Head End
Base Station - GSM, CDMA
Figure 1. FX-500 Block Diagram
FX-500 Low Jitter Frequency Translator
Performance Characteristics
Electrical Performance
Parameter
Output Frequency
4
Supply Voltage
1
Supply Current @ 19.44MHz
48.408MHz
77.760MHz
Input
Input Low Level Voltage
Input High Level Voltage
Frequency
Pulse Width
Output
2
Output High Level Voltage
Output Low Level Voltage
Transition times
2
Rise Time
Fall Time
Duty Cycle
3
≤60MHz
>60MHz
Absolute Pull Range
Leakage Current of Input
Loop Bandwidth (-3 dB), 8kHz input
Jitter
(Application: 8 kHz to 77.760 MHz translation)
Symbol
f
0
V
DD
V
DD
I
DD
I
DD
I
DD
V
IL
V
IH
f
IN
Minimum
0.100
3.0
4.5
Typical
3.3
5.0
15
25
35
Maximum
77.76
3.6
5.5
20
30
40
0.3* V
DD
Units
MHz
V
V
mA
mA
mA
V
V
Hz
ns
V
V
ns
ns
%
ppm
0.7*V
DD
1k
6
0.9*V
DD
77.76M
V
OH
V
OL
t
R
t
F
D
APR
I
C
BW
0.1*V
DD
1.8
1.8
45
40
See Part Numbering
-1
10
4.7
44
0.003
14mm x 9mm x 4.5 mm
1
3.0
3.0
55
60
µA
Hz
ps
ps
UI
rms
peak/peak
peak/peak
Size
1. A 0.1 µF low frequency tantalum bypass capacitor in parallel with a 0.01 µF high frequency ceramic capacitor is recommended.
2. Figure 2 defines the waveform parameters. Figure 3 illustrates the standard test conditions under which these parameters are
specified and tested.
3. Duty cycle is defined as (on time period), with VS = VDD/2, per Figure 2. Duty cycle is measured with a 15pf load per Figure 3.
4. Other frequencies may be available, please contact factory.
.
.
Figure 2. Output Waveform
Figure 3. Output Test Conditions
(25 ±5°C)
Vectron International •
267 Lowell Road, Hudson, NH 03051
• Tel: 1-88-VECTRON-1 • Web: www.vectron.com
2
FX-500 Low Jitter Frequency Translator
Outline Diagram
6
5
4
Pad Layout
FX-500-LAC-GNK
FX-500-LAC-GNK
8K000/77M760
8K000/77M76
VI 142
1
2
3
Pin Out
Pin #
1
2
3
4
5
6
Symbol
f
IN
Tri-state
1
GND
F
o
LD
2
V
DD
Function
Input Frequency
Logic Low = Output Disable / Logic High = Output Enabled
Case and Electrical Ground
Output Frequency
Lock Detect
Power Supply Voltage (3.3 V ± 0.3 or 5.0 V ± 0.5)
1. Tristate is driven to logic high or logic low; there is no internal pull up or pull down resistor.
2. LD is an open collector output requiring a 30k ohm pullup resistor to V
DD
. LD output is logic high under locked condition, logic
low for no input at f
IN
, and for "out-of-lock" condition LD transitions between logic low and logic high at the phase detector frequency.
Tape and Reel
J
F
D
A
E
C
G
B
L
I
H
K
Tape and Reel Dimensions (mm)
Tape Dimensions
Product
FX-500
A
24
B
11.5
C
1.5
D
4
E
12
Reel Dimensions
F
1.78
G
21
H
13
I
100
J
5
K
25
L
330
200
# Per Reel
Vectron International •
267 Lowell Road, Hudson, NH 03051
• Tel: 1-88-VECTRON-1 • Web: www.vectron.com
3
FX-500 Low Jitter Frequency Translator
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is
not implied at these or any other conditions in excess of conditions represented in the operational sections of this
data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability.
Parameter
Power Supply
Storage Temperature
Symbol
V
DD
Tstorage
Ratings
7
-55/125
Unit
Vdc
°C
Reliability
Absolute Maximum Ratings
Parameter
Mechanical Shock
Mechanical Vibration
Lead Solderability
Gross and Fine Leak
Conditions
MIL-STD-883 Method 2002/Test A
MIL-STD-883 Method 2007/Test A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1014
Handling Precautions
Although ESD protection circuitry has been designed into this device, proper precautions should be taken when
handling and mounting. VI employs a Human Body Model and a charged device model for ESD-susceptibility
testing and design protection evaluation. ESD thresholds are dependent on the circuit parameters used to define
the model. Although no industry wide standard has been adopted for the CDM, a standard HBM of resistance =
1500Ω and capacitance = 100pf is widely used and therefore can be used for comparison purposes.
ESD Ratings
Model
Mechanical Shock
Mechanical Vibration
Minimum
1000V
1000V
Conditions
MIL-STD-883, Method 3015
JESD22-C101
Figure 6. Suggested Reflow Profile
Vectron International •
267 Lowell Road, Hudson, NH 03051
• Tel: 1-88-VECTRON-1 • Web: www.vectron.com
4
FX-500 Low Jitter Frequency Translator
Standard Frequencies
1.000 kHz
A1
1.544 MHz
B3
10.000 MHz
C4
19.440 MHz
D6
27.000 MHz
F4
38.880 MHz
H5
62.208 MHz
J8
4.000 kHz
A2
2.048 MHz
B4
12.352 MHz
D1
20.000 MHz
E2
30.720 MHz
H1
40.960 MHz
J1
62.500 MHz
J9
8.000 kHz
A3
3.088 MHz
B6
13.000 MHz
D3
20.480 MHz
E4
32.000 MHz
H2
44.736 MHz
J3
65.536 MHz
J6
16.000 kHz
A4
4.096 MHz
B5
15.000 MHz
D4
24.576 MHz
E6
32.768 MHz
H3
49.152 MHz
J7
74.152 MHz
K1
64.000 kHz
A5
6.480 MHz
C2
16.384 MHz
D5
24.704 MHz
E7
34.368 MHz
H6
51.840 MHz
J4
74.250 MHz
K7
1.024 MHz
B2
8.192 MHz
C3
18.432 MHz
D7
26.000 MHz
F3
37.056 MHz
H4
61.440 MHz
J5
77.760 MHz
K2
Note 1: Other frequencies are available upon request, please contact VI for details
SS is code for non-standard frequencies, list the frequency after the part number.
Note 2: Not all combinations are possible.
Note 3: Output frequency must be equal to or greater than the input frequency. The ratio of f
O
/f
IN
must be an Integer.
Also, the output frequency must be equal to or greater than 100 kHz.
Ordering Information
FX-500
Product Family
FX=Freq. Translator
Package
500: 14.0 x 9.0 x 4.5 mm
Input
K: 5.0V ±o.5 Vdc
L: 3.3V ±0.3 Vdc
Output
A: CMOS
Temperature Range
C: 0 to 70°C
F: -40 to 85°C
X X X
X X X
XX
XX
MHz
Output Frequency
(B2-K2 from table)
Input Frequency
(A1-K2 from table)
Duty Cycle
J = 45/55
K = 40/60
Other
N = n/a
Absolute Pull Range
G = ±50 ppm
N = ±80 ppm
H = ±100 ppm
EXAMPLE: FX-500-LAC-GNK-A3-K2
FX-500, 3.3V, CMOS output, 0 to 70C operating temperature,
±50 ppm APR, 40/60 % duty cycle with an 8kHz input and 77.760MHz output
Vectron International •
267 Lowell Road, Hudson, NH 03051
• Tel: 1-88-VECTRON-1 • Web: www.vectron.com
5
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