VS6451
Ultra small CIF+ reflowable camera module
Data Brief
Features
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CIF+ resolution sensor (384x320 or 320x384)
Electrical and logical interface fully SMIA
compliant
Video data interface - CCP2.0
Command interface - CCI
2.8 V/1.8 V operation
On-board 10 bit ADC
Small physical size
Integral EMC shielding
Ultra low power standby mode
On-chip PLL
Lead free reflowable module
device can be incorporated in the phone system
to run the algorithms in hardware. The STV0984
processor can support 2 cameras. The
specifications of these devices are contained in a
separate document.
The module design is optimized to provide an
ultra small footprint and height, and is designed to
be reflowable at lead-free solder profiles. The
product is lead free.
The lens design is optimized for video conferen-
cing and maintains its performance even after the
high temperatures of lead-free reflow.
VS6451 offers an ultra low power consumption
hardware standby mode consuming less than
30 µW.
Applications
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Mobile phone
PDA
Videophone
Description
This data brief outlines an ultra small reflowable
CIF+ camera module (VS6451) for use across a
range of mobile phone handsets and accessories.
It is primarily designed to be used as a second
camera in video conferencing applications, but
could equally be used as a primary camera. The
camera silicon device is SMIA class 2 profile 0
compliant and is capable of generating raw bayer
CIF+ images up to 30 fps. The VS6451 supports
the CCI control and CCP2.0 data interfaces.
As different phone platforms have different
baseband processors with varying capabilities, it
may not be possible for all phones to support the
associated image processing algorithms. Where
the baseband cannot support this processing
load, a separate hardware accelerator (STV0984)
March 2007
Rev 2
1/4
www.st.com
4
For further information contact your local STMicroelectronics sales office.
VS6451
Figure 1.
Application diagram
Figure 2.
Block diagram
VS6451
CIF+
camera
module
STV0984
CLK or
PDN STV0976
Processor
CCI
CCP2.0
CLK
PDN
I2C
CCP2.0
or
ITU
Baseband
or
Application
Processor
EXTCLK
XSHUTDOWN
VS6451
PLL and Clock Management
Power Mgmt
CCI
Receiver
Sensor
Control
Registers
Power-On Reset
CIF+
Pixel array
1152 x 864
VDIG
DGND
Readout
CCI
CCP2.0
SMIA Rx’er
CLKP
CLKN
DATAP
DATAN
CCP2.0
Transmitter
VS6451
CIF+
camera
module
CLK
PDN
Baseband
or
Application
Processor
SCL
SDA
SMIA
profile 0
frame
formatter
Y Decoder
VANA
AGND
Column ADC
X Decoder
Line SRAM
Table 1.
Technical specifications
Parameter
Values
CIF+ portrait and landscape
0.18 µm HCMOS8i shrink
3.6µm x 3.6µm
+8 dB
+24 dB (max)
61 dB
34 dB (@ 100 lux)
< 7lux
Analogue: 2.4V to 2.9V
Digital: 1.8V ± 0.1V
<60 mW
4.5 mm x 4.5 mm x 3.55 mm
45°+/- 2° (CIF+, CIF equiv. 45°)
2.8
On axis 45% (typ)
Horizontal field (70%) 25% (typical)
<|5%|
60% (typ)
Lead free reflowable BGA
[-40; +85]°C
[-30; +70]°C
[-25; +55]°C
[+5; +30]°C
Pixel array
Sensor technology
Pixel size
Exposure control
Analogue gain
Dynamic range
Signal to noise
Minimum illumination
Supply voltage
Average power consumption @ 30fps
Module size (XYZ) max
Lens HFOV
F number
Lens SFR
Lens TV distortion
Relative illumination
System connectivity
Storage temperature
Functional operating temperature
Normal operating temperature
Optimal operating temperature
2/4
VS6451
Figure 3.
Module outline
4.50
Ordering information
3.55
4.50
Ordering information
Table 2.
Order codes
Part number
VS6451R0BA/TR
Package
USM- CIF - 4.5x4.5x3.55mm
Packing
Tape and reel
Revision history
Table 3.
Date
27-Apr-2006
13-Mar-2007
Document revision history
Revision
1
2
Initial release.
Updated the ordering information and module outline
Changes
3/4
VS6451
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