TDA7342
Digitally controlled audio processor
Features
■
Input multiplexer
– Two stereo and one mono inputs
– One quasi differential input
– Selectable input gain for optimal adaptation
to different sources
Fully programmable loudness function
Volume control in 0.3dB steps including gain
up to 20dB
Zero crossing mute, soft mute and direct mute
Bass and treble control
Four speaker attenuators
– Four independent speakers control in
1.25dB steps for balance and fader facilities
– Independent mute function
All functions programmable via serial I
2
C bus
Due to a highly linear signal processing, using
CMOS-switching techniques instead of standard
bipolar multipliers, very low distortion and very
low noise are obtained. Several new features like
softmute, and zero-crossing mute are
implemented. The soft Mute function can be
activated in two ways:
1.
Via serial bus (Mute byte, bit D0)
Directly on pin 21 through an I/O line of the
microcontroller
2.
LQFP32
■
■
■
■
■
■
Description
The audioprocessor TDA7342 is an upgrade of
the TDA731X audioprocessor family.
Very low DC stepping is obtained by use of a
BICMOS technology.
Order codes
Part number
TDA7342N
TDA7342NTR
Package
LQFP32
LQFP32
Packing
Tube
Tape and reel
November 2006
Rev 2
1/20
www.st.com
1
Contents
TDA7342
Contents
1
Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1
1.2
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
I2C Bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
3.2
3.3
3.4
3.5
Data validity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Start and stop conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Byte format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Transmission without acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4
Software specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1
4.2
4.3
4.4
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Auto increment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Transmitted data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
6
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2/20
TDA7342
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Quick reference data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Subaddress (receive mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Send mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Loudness . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Speaker attenuators (LF, LR, RF, RR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Bass/Treble. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Volume . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3/20
List of figures
TDA7342
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin connections (Top view). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Data validity on the I2C BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Timing diagram of I2C BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Acknowledge on the I2C BUS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Interface protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
LQFP32 Mechanical data & package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4/20
TDA7342
Block diagram and pin descriptions
1
1.1
Figure 1.
Block diagram and pin descriptions
Block diagram
Block diagram
C17 100nF
C11
C13 47nF
OUT(L)
16
IN(L)
15
LOUD(L)
9
21
SM
BOUT(L)
R2
4.7K
C18
100nF
32
C19 2.7nF
TREBLE(L)
SPKR
ATT
25
MUTE
ZERO
CROSS +
MUTE
L3
23
MUTE
CD
CD GND
C3
10
INPUT
SELECTOR
+ GAIN
SOFT
MUTE
SERIAL BUS DECODER + LATCHES
28
27
26
SPKR
ATT
R3
M
R2
5
8
6
7
R3
24
C8
M
R2
R1
ZERO
CROSS +
MUTE
OUT
RIGHT FRONT
OUT
LEFT REAR
LOUD+
VOL
BASS
TREBLE
OUT
LEFT FRONT
BIN(L)
17
18
C1
LEFT
INPUTS
C2
C6
L1
L2
13
12
L2
M
L1
SPKR
ATT
L3
11
SCL
SDA
DIGGND
BUS
C7
MONO INPUT
LOUD+
VOL
BASS
TREBLE
MUTE
RIGHT
INPUTS
C4
C5
R1
SPKR
ATT
22
MUTE
OUT
RIGHT REAR
SUPPLY
30
V
S
31
29
CREF
10μF C9
3
OUT(R)
2
IN(R)
4
LOUD(R)
C12
47nF
14
CSM
CSM
47nF
20
19
BOUT(R)
C14
100nF
R1
4.7K
1
BIN(R)
C15
100nF
TREBLE(R)
D94AU104B
C10
C16
2.7nF
1.2
Pin description
Figure 2.
Pin connections (Top view)
DIG GND
OUT LF
24
23
22
21
20
19
18
17
9 10 11 12 13 14 15 16
LOUD L
CD GND
IN L3
IN L2
IN L1
CSM
IN L
OUT L
CREF
TR L
GND
SDA
SCL
32 31 30 29 28 27 26 25
TR R
IN R
OUT R
LOUD R
IN R3
IN R2
IN R1
MONO
1
2
3
4
5
6
7
8
OUT RF
OUT LR
OUT RR
SM
BOUT R
BIN R
BOUT L
BIN L
V
S
D94AU105A
5/20
模拟与混合信号
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