电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

74VHC27

产品描述TRIPLE 3-INPUT NOR GATE
文件大小135KB,共10页
制造商ST(意法半导体)
官网地址http://www.st.com/
下载文档 选型对比 全文预览

74VHC27概述

TRIPLE 3-INPUT NOR GATE

文档预览

下载PDF文档
74VHC27
TRIPLE 3-INPUT NOR GATE
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.1 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 2
µA
(MAX.) at T
A
=25°C
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
POWER DOWN PROTECTION ON INPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 27
IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
DESCRIPTION
The 74VHC27 is an advanced high-speed CMOS
TRIPLE 3-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provides high noise
immunity and stable output.
Figure 1: Pin Connection And IEC Logic Symbols
O
et
l
so
b
ro
P
e
uc
d
s)
t(
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
O
-
so
b
te
le
ro
P
uc
d
s)
t(
T&R
74VHC27MTR
74VHC27TTR
November 2004
Rev. 4
1/10

74VHC27相似产品对比

74VHC27 74VHC27_04
描述 TRIPLE 3-INPUT NOR GATE TRIPLE 3-INPUT NOR GATE

技术资料推荐更多

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1501  988  2715  1877  2316  31  20  55  38  47 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved