74LVX138
LOW VOLTAGE CMOS 3 TO 8 LINE DECODER (INV.)
WITH 5V TOLERANT INPUTS
s
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
t
PD
= 5.5ns (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
INPUT VOLTAGE LEVEL:
V
IL
=0.8V, V
IH
=2V at V
CC
=3V
LOW POWER DISSIPATION:
I
CC
= 4
µA
(MAX.) at T
A
=25°C
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 138
IMPROVED LATCH-UP IMMUNITY
POWER DOWN PROTECTION ON INPUTS
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
DESCRIPTION
The 74LVX138 is a low voltage CMOS 3 TO 8
LINE DECODER (INVERTING) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
If the device is enabled, 3 binary select (A, B, and
C) determine which one of the outputs will go low.
If enable input G1 is held low or either G2A or G2B
Figure 1: Pin Connection And IEC Logic Symbols
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et
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is held high, the decoding function is inhibited and
all the 8 outputs go to high.
Tree enable inputs are provided to ease cascade
connection and application of address decoders
for memory systems.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
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T&R
74LVX138MTR
74LVX138TTR
August 2004
Rev. 3
1/12
74LVX138
Table 4: Absolute Maximum Ratings
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
Table 5: Recommended Operating Conditions
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Supply Voltage (note 1)
Input Voltage
Output Voltage
Operating Temperature
Input Rise and Fall Time (note 2) (V
CC
= 3.3V)
Parameter
1) Truth Table guaranteed: 1.2V to 3.6V
2) V
IN
from 0.8V to 2.0V
Table 6: DC Specifications
Symbol
Parameter
V
IH
V
IL
O
et
l
so
b
High Level Input
Voltage
Low Level Input
Voltage
ro
P
e
V
CC
(V)
2.0
3.0
3.6
2.0
3.0
3.6
2.0
3.0
3.0
2.0
3.0
3.0
Test Condition
T
A
= 25°C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
I
O
=-50
µA
I
O
=-50
µA
I
O
=-4 mA
I
O
=50
µA
I
O
=50
µA
I
O
=4 mA
V
I
= 5V or GND
V
I
= V
CC
or GND
1.9
2.9
2.58
0.0
0.0
0.1
0.1
0.36
±
0.1
4
2.0
3.0
Typ.
Max.
uc
d
)-
(s
t
b
O
so
te
le
Value
2 to 3.6
0 to 5.5
ro
P
uc
d
s)
t(
Unit
V
V
V
°C
ns/V
0 to V
CC
0 to 100
-55 to 125
Value
-40 to 85°C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.1
0.1
0.44
±
1
40
1.9
2.9
2.4
0.1
0.1
0.55
±
1
40
µA
µA
V
V
Max.
-55 to 125°C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
Max.
V
Unit
V
V
OH
High Level Output
Voltage
V
OL
Low Level Output
Voltage
I
I
I
CC
Input Leakage
Current
Quiescent Supply
Current
3.6
3.6
3/12
74LVX138
Table 7: Dynamic Switching Characteristics
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
C
L
= 50 pF
3.3
0.8
T
A
= 25°C
Min.
Typ.
0.3
-0.5
2
V
-0.3
Max.
0.5
Value
-40 to 85°C
Min.
Max.
-55 to 125°C
Min.
Max.
Unit
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low
Voltage Quiet
Output (note 1, 2)
Dynamic High
Voltage Input (note
1, 3)
Dynamic Low
Voltage Input (note
1, 3)
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Table 8: AC Electrical Characteristics
(Input t
r
= t
f
= 3ns)
Test Condition
Symbol
Parameter
V
CC
(V)
2.7
2.7
3.3
(*)
3.3
(*)
2.7
2.7
3.3
(*)
2.7
2.7
3.3
(*)
2.7
3.3
(*)
C
L
(pF)
15
50
15
50
15
50
T
A
= 25°C
Min.
t
PLH
t
PHL
Propagation Delay
Time
A, B, C to Y
t
PLH
t
PHL
Propagation Delay
Time
G1 to Y
t
PLH
t
PHL
Propagation Delay
Time
G2A or G2B to Y
t
OSLH
t
OSHL
O
et
l
so
b
od
r
P
e
3.3
(*)
15
50
15
50
3.3
(*)
15
50
50
50
uc
)-
(s
t
b
O
Typ.
7.1
9.6
5.5
8.0
8.7
11.2
6.8
9.3
8.8
11.3
6.9
9.4
0.5
0.5
so
Max.
13.8
17.3
8.8
12.3
16.3
19.8
10.6
14.1
16.0
19.5
10.4
13.9
1.0
1.0
te
le
Value
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
ro
P
Min.
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
uc
d
Max.
18.5
22.0
11.5
15.0
205
25.0
13.5
17.0
19.5
23.0
13.5
17.0
1.5
1.5
s)
t(
-40 to 85°C
Max.
16.5
20.0
10.5
14.0
19.5
23.0
12.5
16.0
18.5
22.0
11.5
15.0
1.5
1.5
-55 to 125°C
Unit
ns
ns
ns
Output To Output
Skew Time (note1,
2)
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
±
0.3V
4/12
74LVX138
Table 9: Capacitive Characteristics
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
3.3
f
IN
= 10MHz
T
A
= 25°C
Min.
Typ.
4
34
Max.
Value
-40 to 85°C
Min.
Max.
10
-55 to 125°C
Min.
Max.
10
pF
pF
Unit
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
Figure 4: Test Circuit
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50Ω)
Figure 5: Waveform - Propagation Delays For Inverting Outputs
(f=1MHz; 50% duty cycle)
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5/12
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