74LVC125A
LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE)
HIGH PERFORMANCE
s
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED: t
PD
= 4.8ns (MAX.) at V
CC
= 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 3.6V (1.2V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVC125AMTR
74LVC125ATTR
DESCRIPTION
The 74LVC125A is a low voltage CMOS QUAD
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology. It is ideal for 1.65 to 3.6 V
CC
operations and low power and low noise
applications.
It can be interfaced to 5V signal environment for
inputs in mixed 3.3/5V system.
These devices require the same 3-STATE control
input G to be taken high to make the output go in
to the high impedance state.
It has more speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
Rev. 8
1/12
74LVC125A
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
PIN N°
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
SYMBOL
G1 to G4
A1 to A4
Y1 to Y4
GND
V
CC
NAME AND FUNCTION
Output Enable Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
A
X
L
H
X : Don’t care
Z : High Impedance
G
H
L
L
Y
Z
L
H
Table 4: Absolute Maximum Ratings
Symbol
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
Supply Voltage
DC Input Voltage
DC Output Voltage (High Impedance or V
CC
= 0V)
DC Output Voltage (High or Low State) (note 1)
DC Input Diode Current
DC Output Diode Current (note 2)
DC Output Current
Parameter
Value
-0.5 to +7.0
-0.5 to +7.0
-0.5 to +7.0
-0.5 to V
CC
+ 0.5
- 50
- 50
±
50
±
100
-65 to +150
300
Unit
V
V
V
V
mA
mA
mA
mA
°C
°C
I
CC
or I
GND
DC V
CC
or Ground Current per Supply Pin
T
stg
Storage Temperature
T
L
Lead Temperature (10 sec)
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
O
absolute maximum rating must be observed
2) V
O
< GND
2/12
74LVC125A
Table 5: Recommended Operating Conditions
Symbol
V
CC
V
I
V
O
V
O
I
OH
, I
OL
I
OH
, I
OL
I
OH
, I
OL
I
OH
, I
OL
T
op
dt/dv
Supply Voltage (note 1)
Input Voltage
Output Voltage (High Impedance or V
CC
= 0V)
Output Voltage (High or Low State)
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
High or Low Level Output Current (V
CC
= 2.7 to 3.0V)
High or Low Level Output Current (V
CC
= 2.3 to 2.7V)
High or Low Level Output Current (V
CC
= 1.65 to 2.3V)
Operating Temperature
Input Rise and Fall Time (note 2)
Parameter
Value
1.65 to 3.6
0 to 5.5
0 to 5.5
0 to V
CC
±
24
±
12
±
8
±
4
-55 to 125
0 to 10
Unit
V
V
V
V
mA
mA
mA
mA
°C
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
2) V
IN
from 0.8V to 2V at V
CC
= 3.0V
Table 6: DC Specifications
Test Condition
Symbol
Parameter
V
CC
(V)
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
1.65 to 1.95
2.3 to 2.7
2.7 to 3.6
1.65 to 3.6
1.65
2.3
2.7
3.0
3.0
V
OL
Low Level Output
Voltage
1.65 to 3.6
1.65
2.3
2.7
3.0
I
I
I
off
I
OZ
Input Leakage Current
Power Off Leakage
Current
High Impedance
Output Leakage
Current
Quiescent Supply
Current
I
CC
incr. per Input
3.6
0
3.6
I
O
=-100
µA
I
O
=-4 mA
I
O
=-8 mA
I
O
=-12 mA
I
O
=-18 mA
I
O
=-24 mA
I
O
=100
µA
I
O
=4 mA
I
O
=8 mA
I
O
=12 mA
I
O
=24 mA
V
I
= 0 to 5.5V
V
I
or V
O
= 5.5V
V
I
= V
IH
or V
IL
V
O
= 0 to 5.5V
V
I
= V
CC
or GND
3.6
2.7 to 3.6
V
I
or V
O
= 3.6 to
5.5V
V
IH
= V
CC
-0.6V
V
CC
-0.2
1.2
1.7
2.2
2.4
2.2
0.2
0.45
0.7
0.4
0.55
±
5
10
±
5
-40 to 85 °C
Min.
0.65V
CC
1.7
2
0.35V
CC
0.7
0.8
V
CC
-0.2
1.2
1.7
2.2
2.4
2.2
0.2
0.45
0.7
0.4
0.55
±
5
10
±
5
µA
µA
µA
V
V
Max.
Value
-55 to 125 °C
Min.
0.65V
CC
1.7
2
0.35V
CC
0.7
0.8
V
V
Max.
Unit
V
IH
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
V
IL
V
OH
I
CC
10
±
10
500
10
±
10
500
µA
µA
3/12
∆I
CC
74LVC125A
Table 7: Dynamic Switching Characteristics
Test Condition
Symbol
Parameter
V
CC
(V)
3.3
C
L
= 50pF
V
IL
= 0V, V
IH
= 3.3V
Value
T
A
= 25 °C
Min.
Typ.
0.8
-0.8
Max.
V
Unit
V
OLP
V
OLV
Dynamic Low Level Quiet
Output (note 1)
1) Number of output defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
Table 8: AC Electrical Characteristics
Test Condition
Symbol
Parameter
V
CC
(V)
C
L
(pF)
30
30
50
50
30
30
50
50
30
30
50
50
R
L
(Ω)
1000
500
500
500
1000
500
500
500
1000
500
500
500
t
s
=
t
r
(ns)
2.0
2.0
2.5
2.5
2.0
2.0
2.5
2.5
2.0
2.0
2.5
2.5
-40 to 85 °C
Min.
Max.
9.0
6.3
5.5
4.8
9.9
7.4
6.6
5.4
11
5.6
5.0
4.6
1
Value
-55 to 125 °C
Min.
Max.
12
8.5
6.5
5.8
13
9.6
7.9
6.5
14
7.3
6.0
5.5
1
Unit
t
PLH
t
PHL
Propagation Delay
Time
t
PZL
t
PZH
t
PLZ
t
PHZ
t
OSLH
t
OSHL
1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
Output Enable Time 1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
Output Disable Time 1.65 to 1.95
2.3 to 2.7
2.7
3.0 to 3.6
Output To Output
2.7 to 3.6
Skew Time (note1,
2)
1.5
1
ns
1
1
ns
2
2
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|
2) Parameter guaranteed by design
Table 9: Capacitive Characteristics
Test Condition
Symbol
Parameter
V
CC
(V)
Value
T
A
= 25 °C
Min.
f
IN
= 10MHz
Typ.
4
1.8
2.5
3.3
28
30
34
Max.
pF
pF
Unit
C
IN
C
PD
Input Capacitance
Power Dissipation Capacitance
(note 1)
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/n (per circuit)
4/12
74LVC125A
Figure 3: Test Circuit
R
T
= Z
OUT
of pulse generator (typically 50Ω)
Table 10: Test Circuit And Waveform Symbol Value
Symbol
1.65 to 1.95V
C
L
R
L
= R
1
V
S
V
IH
V
M
V
OH
V
X
V
Y
t
r
= t
r
30pF
1000Ω
2 x V
CC
V
CC
V
CC
/2
V
CC
V
OL
+ 0.15V
V
OH
- 0.15V
<2.0ns
2.3 to 2.7V
30pF
500Ω
2 x V
CC
V
CC
V
CC
/2
V
CC
V
OL
+ 0.15V
V
OH
- 0.15V
<2.0ns
V
CC
2.7V
50pF
500Ω
6V
2.7V
1.5V
3.0V
V
OL
+ 0.3V
V
OH
- 0.3V
<2.5ns
3.0 to 3.6V
50pF
500Ω
6V
2.7V
1.5V
3.0V
V
OL
+ 0.3V
V
OH
- 0.3V
<2.5ns
Figure 4: Waveform - Propagation Delays
(f=1MHz; 50% duty cycle)
5/12
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