NJW1321
WIDE BAND VIDEO SWITCH WITH I
2
C BUS
s
GENERAL DESCRIPTION
2
The NJW1321 is a Wide Band Video Switch with I C BUS.
The NJW1321 includes switch of 4-input 2-output and 6dB
amplifier. It is suitable for RGB or Y, Pb, and Pr signal because
frequency range is 100MHz.
The NJW1321 includes external logic control terminals and
external logic discernment terminals.
The NJW1321 is suitable for PTV, DTV, PDP and other high quality
AV systems.
s
FEATURES
q
Operating Voltage
2
q
I C BUS Interface
q
4-input 2-output 3-Circuits
q
Wide frequency range
s
PACKAGE OUTLINE
NJW1321FP1
+9.0V
0dB at 100MHz typ.
-3dB at 300MHz typ.
q
Internal 6dB amplifier (Selectable Bypass or 6dB)
q
External logic discernment terminal
q
External logic control terminal
q
Selectable slave address
q
Power Save Circuit
q
Bi-CMOS Technology
q
Package Outline
QFP48
s
BLOCK DIAGRAM
Y/R IN1
Y/R IN2
Y/R IN3
Y/R IN4
6dB
6dB
Y/R OUT1
Y/R OUT2
Pb/G IN1
Pb/G IN2
Pb/G IN3
Pb/G IN4
6dB
6dB
Pb/G OUT1
Pb/G OUT2
Pr/B IN1
Pr/B IN2
Pr/B IN3
Pr/B IN4
6dB
6dB
Pr/B OUT1
Pr/B OUT2
PORT 0
PORT 1
PORT 2
PORT 3
V+
GND
VREF
BIAS
I
2
C BUS
ADDRESS
SDA
SCL
AUX 0
AUX 1
AUX 2
AUX 3
DGND
Ver.3
-1-
NJW1321
s
PIN CONFIGURATION
GND
Pr IN4
V+
Y IN3
GND
Pb IN3
V+
Pr IN3
GND
Y IN2
39
Pb IN4
V+
Y IN4
V+
Y OUT1
GND
Pb OUT1
GND
Pr OUT1
AUX3
AUX2
Y OUT2
AUX1
AUX0
38
25
24
Pb OUT2
PORT0
PORT1
Pr OUT2
V+
VREF
DGND
GND
SDA
SCL
48
1
14
15
1. V+
2. Pb IN2
3. GND
4. Pr IN2
5. GND
6. Y IN1
7. V+
8. Pb IN1
9. V+
10. Pr IN1
11. GND
12. PORT3
-2-
Pb IN2
GND
Pr IN2
GND
Y IN1
V+
Pb IN1
V+
Pr IN1
GND
PORT3
PORT2
ADR
13. PORT2
14. ADR
15. SCL
16. SDA
17. GND
18. DGND
19. VREG
20. V+
21. Pr OUT2
22. PORT1
23. PORT 0
24. Pb OUT2
25. AUX0
26. AUX1
27. Y OUT2
28. AUX2
29. AUX3
30. Pr OUT1
31. GND
32. Pb OUT1
33. GND
34. Y OUT1
35. V+
36. Y IN4
37. V+
38. Pb IN4
39. GND
40. Pr IN4
41. V+
42. Y IN3
43. GND
44. Pb IN3
45. V+
46. Pr IN3
47. GND
48. Y IN2
V+
NJW1321
s
ABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
SYMBOL
RATINGS
UNIT
+
Supply Voltage
V
12.0
V
Power Dissipation
P
D
1875(note)
mW
Topr
-40 to +75
Operating Temperature Range
°C
Tstg
-40 to +150
Storage Temperature Range
°C
(Note) At on a board of EIA/JEDEC specification. (76.2
×
114.3
×
1.6mm Two layers, FR-4)
s
RECOMMENDED OPEARATING CONDITION
(Ta=25°C)
PARAMETER
Operating Voltage
SYMBOL
Vopr
+
TEST CONDITION
MIN.
8.5
TYP.
9.0
MAX.
9.5
UNIT
V
s
ELECTRICAL CHARACTERISTICS
(V =9.0V, R
L
=10KΩ, Ta=25°C)
q
VIDEO
PARAMETER
Operating Current
Maximum Output Voltage
Voltage Gain 1
Voltage Gain 2
Frequency
Characteristic 1
Frequency
Characteristic 2
Frequency
Characteristic 3
Frequency
Characteristic 4
Cross talk 1
Cross talk 2
Differential Gain
Differential Phase
S/N
q
PORT, AUX
PARAMETER
PORT Input Voltage H
PORT Input Voltage M
PORY Input Voltage L
AUX Output Voltage H
AUX Output Voltage M
AUX Output Voltage L
ADR Input Voltage H
ADR Input Voltage L
SYMBOL
V
PTH
V
PTM
V
PTL
V
AUXH
V
AUXM
V
AUXL
V
ADRH
V
ADRL
TEST CONDITION
MIN.
3.5
1.4
0
3.5
1.4
0
3.5
0
TYP.
-
-
-
-
-
-
-
-
MAX.
5.5
2.4
0.8
5.5
2.4
0.8
5.0
1.0
UNIT
V
V
V
V
V
V
V
V
SYMBOL
I
cc
Vom
Gv1
Gv2
Gf1
Gf2
Gf3
Gf4
CTB1
CTB2
DG
DP
SNv
No signal
f=100kHz, THD=1%
6dB Mode
Vin=100kHz, 1.0Vp-p Sin signal
Bypass Mode
Vin=100kHz, 1.0Vp-p Sin signal
6dB Mode
Vin=100MHz / 100kHz, 1.0Vp-p Sin signal
Bypass Mode
Vin=100MHz / 100kHz, 1.0Vp-p Sin signal
6dB Mode
Vin=300MHz / 100kHz, 1.0Vp-p Sin signal
Bypass Mode
Vin=300MHz / 100kHz, 1.0Vp-p Sin signal
Vin=4.43MHz,1.0Vp-p Sin signal
Vin=50MHz,1.0Vp-p Sin signal
Vin=1.0Vp-p 10step Video signal
Vin=1.0Vp-p 10step Video signal
Vin=1.0Vp-p,100% White Video Signal
TEST CONDITION
MIN.
-
2.0
6.0
-0.5
-
-
-
-
-
-
-
-
-
TYP.
85
2.5
6.4
0.0
0
0
-3.0
-3.0
-60
-40
0.3
0.3
65
MAX.
100
-
6.8
0.5
-
-
-
-
-50
-
-
-
-
UNIT
mA
Vp-p
dB
dB
dB
dB
dB
dB
dB
dB
%
deg
dB
-3-
NJW1321
s
I C BUS BLOCK CHARACTERISTICS (SDA,SCL)
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Low Level Output Voltage (3mA at SDA pin)
Maximum Output Current
Maximum Clock Frequency
Data Change Minimum Waiting Time
Data Transfer Start Minimum Waiting Time
Low Level Clock Pulse Width
High Level Clock Pulse Width
Minimum Start Preparation Waiting Time
Minimum Data Hold Time
Minimum Data Preparation Time
Rise Time
Fall Time
Minimum Stop Preparation Waiting Time
I C BUS Load Condition:
2
2
SYMBOL
V
IH
V
IL
I
IH
I
IL
V
OL
I
OL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
MIN.
3.0
0
-
-
0
-3.0
-
4.7
4.0
4.7
4.0
4.0
0.0
250
-
-
4.0
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX.
5.0
1.5
10
10
0.4
-
100
-
-
-
-
-
3.45
-
1.0
300
-
UNIT
V
V
µA
µA
V
mA
kHz
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
Pull up resistance 4kΩ (Connected to +5V)
Load capacitance 200pF (Connected to GND)
SDA
t
BUF
t
R
t
F
t
HD:STA
SCL
t
HD:STA
t
LOW
P
S
t
HD:DAT
t
HIGH
t
SU:DAT
Sr
t
SU:STA
t
SU:STO
P
-4-
NJW1321
s
EQUIVALENT CIRCUIT
PIN No.
NAME
6
8
10
48
2
4
42
44
46
36
38
40
Y IN1
Pb IN1
Pr IN1
Y IN2
Pb IN2
Pr IN2
Y IN3
Pb IN3
Pr IN3
Y IN4
Pb IN4
Pr IN4
FUNCTION
INSIDE EQUIVALENT CIRCUIT
V
+
V
+
V
+
VOLTAGE
Y,Pb,Pr Input
RGB Input
150kΩ
100Ω
4.4V
V
+
V
+
34
32
30
27
24
21
Y OUT1
Pb OUT1
Pr OUT1
Y OUT2
Pb OUT2
Pr OUT2
Y,Pb,Pr Output
RGB Output
3.0V
50Ω
V
+
V
+
23
22
13
12
PORT0
PORT1
PORT2
PORT3
Logic input terminal
66Ω
100kΩ
-
V
+
V
+
V
+
1kΩ
25
26
28
29
AUX0
AUX1
AUX2
AUX3
Auxiliary 3 values voltage
output terminal
66Ω
0V
1.9V
5.0V
-5-
stm32/stm8
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