D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
June 1997
NDS8936
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
Features
5.3A, 30V. R
DS(ON)
= 0.035
Ω
@ V
GS
= 10V
R
DS(ON)
= 0.05
Ω
@ V
GS
= 4.5V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package.
________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
NDS8936
30
± 20
(Note 1a)
Units
V
V
A
± 5.3
± 20
2
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
W
1.6
1
0.9
-55 to 150
°C
T
J
,T
STG
R
θJA
R
θJC
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8936 Rev. G
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
Parameter
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
Gate Threshold Voltage
Static Drain-Source On-Resistance
Conditions
V
GS
= 0 V, I
D
= 250 µA
V
DS
= 24 V, V
GS
= 0 V
T
J
= 55°C
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
T
J
= 125°C
V
GS
= 10 V, I
D
= 5.3 A
T
J
= 125°C
V
GS
= 4.5 V, I
D
= 4.4 A
T
J
= 125°C
I
D(on)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 10 V,
I
D
= 5.3 A, V
GS
= 10 V
V
DD
= 10 V, I
D
= 1 A,
V
GEN
= 10 V, R
GEN
= 6
Ω
V
GS
= 10 V, V
DS
= 5 V
V
GS
= 4.5 V, V
DS
= 5 V
V
DS
= 10 V, I
D
= 5.3 A
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
DYNAMIC CHARACTERISTICS
720
370
250
12
13
29
10
19
2.2
5.5
20
30
50
20
30
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
20
10
10.5
S
1
0.7
1.6
1.2
0.033
0.046
0.046
0.064
Min
30
1
10
100
-100
2.8
2.2
0.035
0.063
0.05
0.09
A
Typ
Max
Units
V
µA
µA
nA
nA
V
OFF CHARACTERISTICS
ON CHARACTERISTICS
(Note 2)
Ω
SWITCHING CHARACTERISTICS
(Note 2)
NDS8936 Rev. G
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
I
S
V
SD
t
rr
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Parameter
Conditions
Min
Typ
Max
1.2
Units
A
V
ns
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
Reverse Recovery Time
V
GS
= 0 V, I
S
= 5.3 A
(Note 2)
0.9
1.3
100
V
GS
= 0 V, I
F
= 1.25 A, dI
F
/dt = 100 A/µs
P
D
(
t
) =
R
θ
JA
(
t
)
T
J
−
T
A
=
R
θ
JC
+
R
θ
CA
(
t
)
T
J
−
T
A
=
I
2
(
t
) ×
R
DS
(
ON
)
D
T
J
Typical R
qJA
for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 78
o
C/W when mounted on a 0.5 in
2
pad of 2oz copper.
b. 125
o
C/W when mounted on a 0.02 in
2
pad of 2oz copper.
c. 135
o
C/W when mounted on a 0.003 in
2
pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS8936 Rev. G
Typical Electrical Characteristics
25
V
GS
=10V
3
6.0 5.0
4.5
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 3.0V
4.0
R
DS(ON)
, NORMALIZED
I
D
, DRAIN-SOURCE CURRENT (A)
20
2.5
3.5
4.0
4.5
15
2
3.5
10
1.5
5.0
6.0
10
5
3.0
1
0
0
0.5
1
1.5
2
V
DS
, DRAIN-SOURCE VOLTAGE (V)
2.5
3
0.5
0
5
10
15
I
D
, DRAIN CURRENT (A)
20
25
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
1.6
2
DRAIN-SOURCE ON-RESISTANCE
I
D
= 5.3A
1.4
V
GS
= 10V
DRAIN-SOURCE ON-RESISTANCE
1.75
R
DS(ON)
, NORMALIZED
V
G S
=10V
R
DS(ON)
, NORMALIZED
1.5
1.2
TJ = 125°C
1.25
1
25°C
1
0.8
-55°C
0.75
0.6
-50
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
J
125
150
0.5
0
5
10
15
I
D
, DRAIN CURRENT (A)
20
25
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
25
1.2
125°C
V
th
, NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE
V
DS
= 10V
20
I
D
, DRAIN CURRENT (A)
TJ = -55°C
25°C
1.1
V
DS
= V
GS
I
D
= 250µA
1
15
0.9
10
0.8
5
0.7
0
1
2
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
6
0.6
-50
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
J
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with
Temperature.
NDS8936 Rev. G