Microcomputer Components
SAB 80C517/80C537
8-Bit CMOS Single-Chip Microcontroller
User's Manual 05.94
Edition 05.95
This edition was realized using the software
system FrameMaker
®
.
Published by Siemens AG,
Bereich Halbleiter, Marketing-
Kommunikation, Balanstraße 73,
81541 München
©
Siemens AG 1995.
All Rights Reserved.
Attention please!
As far as patents or other rights of third par-
ties are concerned, liability is only assumed
for components, not for applications, pro-
cesses and circuits implemented within com-
ponents or assemblies.
The information describes the type of compo-
nent and shall not be considered as assured
characteristics.
Terms of delivery and rights to change design
reserved.
For questions on technology, delivery and
prices please contact the Semiconductor
Group Offices in Germany or the Siemens
Companies and Representatives worldwide
(see address list).
Due to technical requirements components
may contain dangerous substances. For in-
formation on the types in question please
contact your nearest Siemens Office, Semi-
conductor Group.
Siemens AG is an approved CECC manufac-
turer.
Packing
Please use the recycling operators known to
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your nearest sales office. By agreement we
will take packing material back, if it is sorted.
You must bear the costs of transport.
For packing material that is returned to us un-
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Components used in life-support devices
or systems must be expressly authorized
for such purpose!
Critical components
1
of the Semiconductor
Group of Siemens AG, may only be used in
life-support devices or systems
2
with the ex-
press written approval of the Semiconductor
Group of Siemens AG.
1 A critical component is a component used
in a life-support device or system whose
failure can reasonably be expected to
cause the failure of that life-support de-
vice or system, or to affect its safety or ef-
fectiveness of that device or system.
2 Life support devices or systems are in-
tended (a) to be implanted in the human
body, or (b) to support and/or maintain
and sustain human life. If they fail, it is
reasonable to assume that the health of
the user may be endangered.
Revision History
SAB 80C517/80C537 User’s Manual
Revision History:
04.95
Previous Releases:
Page
119
133
141
167
188
360
06.91/10.92/08.93/04.94
Subjects (changes since last revision)
Figure 7-33, writing error corrected
Pin assignment Table 7-10 corrected
Page number reference number corrected
Software watchdog timer start: extended description
Description of CTF flag modified
ROM verification timing: text added
Semiconductor Group
4
80C517/80C537
Table of Contents
Page
1
2
3
3.1
3.2
4
4.1
4.2
4.3
4.4
5
5.1
5.2
5.3
5.4
5.5
6
6.1
6.1.1
6.1.2
6.2
7
7.1
7.1.1
7.1.2
7.1.3
7.1.4
7.1.4.1
7.1.4.2
7.1.4.3
7.2
7.2.1
7.2.1.1
7.2.1.2
7.2.1.3
7.2.1.4
7.2.2
7.2.2.1
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Fundamental Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Central Processing Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
CPU Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
General Purpose Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
External Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Accessing External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
Eight Datapointers for Faster External Bus Access . . . . . . . . . . . . . . . . . . . .29
PSEN, Program Store Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
ALE, Address Latch Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
Overlapping External Data and Program Memory Spaces . . . . . . . . . . . . . .33
System Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Hardware Reset and Power-Up Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Reset Function and Circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
Hardware Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .38
Reset Output Pin (RO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
On-Chip Peripheral Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Parallel I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Port Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Port 0 and Port 2 used as Address/Data Bus . . . . . . . . . . . . . . . . . . . . . . . .45
Alternate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46
Port Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48
Port Loading and Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49
Read-Modify-Write Feature of Ports 0 through 6 . . . . . . . . . . . . . . . . . . . . . .49
Serial Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
Serial Interface 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
Operating Modes of Serial Interface 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51
Multiprocessor Communication Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
Baud Rates of Serial Channel 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
New Baud Rate Generator for Serial Channel 0 . . . . . . . . . . . . . . . . . . . . . .58
Serial Interface 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Operating Modes of Serial Interface 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61
Semiconductor Group
5
80C517/80C537
Table of Contents
Page
7.2.2.2
7.2.2.3
7.2.2.4
7.2.3
7.2.3.1
7.2.3.2
7.2.3.3
7.2.3.4
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.4
7.4.1
7.4.1.1
7.4.1.2
7.4.2
7.4.3
7.5
7.5.1
7.5.2
7.5.3
7.5.4
7.5.4.1
7.5.4.2
7.5.5
7.5.5.1
7.5.5.2
7.5.6
7.6
7.6.1
7.6.2
7.6.3
7.6.4
7.6.5
7.7
7.7.1
7.7.2
7.7.3
7.8
Multiprocessor Communication Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
Baud Rates of Serial Channel 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63
New Baud Rate Generator for Serial Channel 1 . . . . . . . . . . . . . . . . . . . . . .64
Detailed Description of the Operating Modes . . . . . . . . . . . . . . . . . . . . . . . .66
Mode 0, Synchronous Mode (Serial Interface 0) . . . . . . . . . . . . . . . . . . . . . .66
Mode 1/Mode B, 8-Bit UART (Serial Interfaces 0 and 1) . . . . . . . . . . . . . . . .67
Mode 2, 9-Bit UART (Serial Interface 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
Mode 3 / Mode A, 9-Bit UART (Serial Interfaces 0 and 1) . . . . . . . . . . . . . . .68
Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79
Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81
Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82
A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
Function and Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .83
lnitialization and Input Channel Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .83
Start of Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87
Reference Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .87
A/D Converter Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91
The Compare/Capture Unit (CCU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93
Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97
The Compare Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101
Compare Function in the CCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103
Compare Modes of the CCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103
Compare Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .104
Compare Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106
Timer/Compare Register Configurations in the CCU . . . . . . . . . . . . . . . . . .107
Compare Function of Timer 2 with Registers CRC, CC1 to CC4 . . . . . . . . .108
Compare Function of Registers CM0 to CM7 . . . . . . . . . . . . . . . . . . . . . . .116
Capture Function in the CCU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .123
Arithmetic Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
Programming the MDU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
Multiplication/Division . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .128
Normalize and Shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
The Overflow Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
The Error Flag . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
Idle Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .136
Power-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .139
Slow-Down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .140
Fail Save Mechanisms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141
Semiconductor Group
6
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