Advance‡
MT9M032: 1/4.5-Inch 1.6Mp CMOS Digital Image Sensor
Features
1/4.5-Inch 1.6Mp CMOS Digital Image
Sensor
MT9M032
For the latest data sheet, refer to Micron’s Web site:
www.micron.com/imaging
Features
Table 2:
Parameter
Key Performance Parameters
Value
1/4.5-inch (4:3)
3.24mm(H) x 2.41mm(V)
1472H x 1096V
2.2 x 2.2µm
RGB Bayer pattern, mono
Global reset release (GRR)
(snapshot only), electronic
rolling shutter (ERS)
99 Mp/s / 49.5 MHz
Programmable up to 30 fps
Programmable up to 60 fps
12-bit, on-chip
1.4 V/lux-sec (550nm)
2.1 V/lux-sec (monochrome)
70.1dB
38.1dB
1.7–1.9V
2.6–3.1V
2.6–3.1V
2.6–3.1V
364.6mW at 2.8V
–30°C to +70°C
48-pin CLCC
•
• Maximum frame rate
(1284H x 812V/60 fps at 99 MHz)
• Superior low-light performance
• Low dark current
• Global reset release (GRR), which starts the exposure
of all rows simultaneously
• Simple two-wire serial interface
• Programmable controls: gain, frame rate,
frame size, exposure
• Horizontal and vertical mirror image
• Automatic black level calibration
• On-chip phase-locked loop (PLL) oscillator
• Bulb exposure mode for arbitrary exposure times
• Snapshot mode to take frames on demand
• Parallel data output
• Electronic rolling shutter (ERS), progressive scan
• Arbitrary image decimation with anti-aliasing
• Programmable I/O slew rate
• Programmable power-down mode
(mode A or mode B)
• Xenon and LED flash support with fast exposure
adaptation
• Flexible support for external auto focus, optical
zoom, and mechanical shutter
DigitalClarity
®
CMOS imaging technology
Optical format
Active imager size
Active pixels
Pixel size
Color filter array
Shutter type
Maximum data rate/
master clock
Frame
1440H x 1080V
rate
1280H x 720V
ADC resolution
Responsivity
Dynamic range
SNR
MAX
Digital
Supply
I/O
voltage PLL
Analog
Power consumption
Operating temperature
Packaging
Ordering Information
Table 1:
Available Part Numbers
Description
Part Number
MT9M032C12STCES
MT9M032C12STMUES
48-pin Pb-free CLCC/color
48-pin Pb-free CLCC/mono/
parallel
MT9M032C12STMUHES 48-pin Pb-free CLCC/mono/
parallel headboard
MT9M032C12STCHES
48-pin Pb-free CLCC/color/
parallel headboard
MT9M032C12STCDES
48-pin Pb-free color demo kit
MT9M032C12STMUDES 48-pin Pb-free mono demo kit
Applications
• High definition surveillance camera
• High speed surveillance camera
• ePTZ camera
PDF: 09005aef82bee26e/Source: 09005aef82b99597
MT9M032_LDS_1 Rev. B 11/07 EN
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.
Advance
MT9M032: 1/4.5-Inch 1.6Mp CMOS Digital Image Sensor
General Description
General Description
The Micron
®
Imaging MT9M032 is a 1/4.5-inch format CMOS active-pixel digital image
sensor with a pixel array of 1472H x 1096V. The default active imaging array size is
1440 x 1080. It incorporates sophisticated on-chip camera functions such as windowing,
mirroring, and snapshot mode. It is programmable through a simple two-wire serial
interface and has very low power consumption.
The MT9M032 digital image sensor features DigitalClarity—Micron’s breakthrough low-
noise CMOS imaging technology that achieves near-CCD image quality (based on
signal-to-noise ratio and low-light sensitivity) while maintaining the inherent size, cost,
and integration advantages of CMOS.
Functional Overview
The MT9M032 is a progressive-scan sensor that generates a stream of pixel data at a
constant frame rate. It uses an on-chip, phase-locked loop (PLL) to generate all internal
clocks from a single master input clock running between 8 and 16.5 MHz.
User interaction with the sensor is through the two-wire serial bus, which communi-
cates with the array control, analog signal chain, and digital signal chain. The core of the
sensor is a 1.6Mp active-pixel array. The timing and control circuitry sequences through
the rows of the array, resetting and then reading each row in turn. In the time interval
between resetting a row and reading that row, the pixels in the row integrate incident
light.
The exposure is controlled by varying the time interval between reset and readout. Once
a row has been read, the data from the columns is sequenced through an analog signal
chain (providing offset correction and gain), and then through an ADC. The output from
the ADC is a 12-bit value for each pixel in the array. The ADC output passes through a
digital processing signal chain (which provides further data path corrections and applies
digital gain). The pixel data are output at a rate of up to 99 Mp/s, in addition to frame
and line synchronization signals in parallel mode corresponding to a pixel clock rate of
99 MHz. Figure 1 shows the block diagram of the sensor.
Figure 1:
Block Diagram – Parallel Output
SCLK
S
DATA
Serial
Interface
Array Control
Data Path
D
OUT
[11:0]
FRAME_VALID
LINE_VALID
PIXCLK
RESET_BAR
EXTCLK
Pixel Array
1600H x 1152V
Analog Signal Chain
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MT9M032_LDS_2 - Rev. B 11/07 EN
2
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
Advance
MT9M032: 1/4.5-Inch 1.6Mp CMOS Digital Image Sensor
Functional Overview
The pixel array contains optically active and light-shielded (dark) pixels. The dark pixels
are used to provide data for on-chip offset correction algorithms (black level control).
The sensor contains a set of control and status registers that can be used to control many
aspects of the sensor behavior including the frame size, exposure, and gain setting.
These registers can be accessed through a two-wire serial interface.
The output from the sensor (MT9M032C12STC) is a Bayer pattern; alternate rows are a
sequence of either green and red pixels or blue and green pixels. The offset and gain
stages of the analog signal chain provide per-color control of the pixel data.
A flash strobe output signal is provided to allow an external xenon or LED light source to
synchronize with the sensor exposure time and to support the provision of an external
mechanical shutter.
PDF: 09005aef82bee26e/Source: 09005aef82b99597
MT9M032_LDS_2 - Rev. B 11/07 EN
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
Advance
MT9M032: 1/4.5-Inch 1.6Mp CMOS Digital Image Sensor
Signal Descriptions
Signal Descriptions
Table 3 provides signal descriptions for the MT9M032.
Table 3:
Pin
Numbers
26
21
33
5
23, 25
45
28
27
1
4
48
46
20
22
24
37
35
34
38
40
41
47
Signal Descriptions
Name
SCLK
RESET_BAR
EXTCLK
TRIGGER
TEST
S
ADDR
0
S
ADDR
1
S
DATA
STROBE
D
OUT
[0]
D
OUT
[1]
D
OUT
[2]
D
OUT
[3]
D
OUT
[4]
D
OUT
[5]
D
OUT
[6]
D
OUT
[7]
D
OUT
[8]
D
OUT
[9]
D
OUT
[10]
D
OUT
[11]
PIXCLK
Type
Input
Input
Input
Input
Input
Input
Input
I/O
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Description
Serial clock. Pull to V
DD
_IO with a 1.5kΩ resistor (depending on bus loading).
Master reset signal, active LOW.
Input clock signal 8–49.5 MHz.
Snapshot trigger. Used to trigger one frame of output in snapshot modes.
Enables manufacturing test modes. Tie to digital GND for functional
operation.
Serial address. Pull to V
DD
_IO or D
GND
to set serial address.
Serial address. Pull to V
DD
_IO or D
GND
to set serial address.
Serial data. Pull to V
DD
_IO with a 1.5kΩ resistor (depending on bus loading).
Snapshot strobe. Driven HIGH when all pixels are exposing in snapshot
modes.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel data. Pixel data is 12-bit. MSB (D
OUT
11) through LSB (D
OUT
0) of each
pixel, to be captured on the falling edge of PIXCLK.
Pixel clock. Used to qualify the LINE_VALID (LV), FRAME_VALID (FV), and
D
OUT
(11:0). These outputs should be captured on the falling edge of this
signal.
Frame valid. Qualified by PIXCLK. Driven HIGH during active pixels and
horizontal blanking of each frame and LOW during vertical blanking.
Line valid output. Qualified by PIXCLK. Driven HIGH with active pixels of each
line and LOW during horizontal blanking periods. External pull-down resistor
to D
GND
(typical 10kΩ–100kΩ) required for proper initialization sequence.
Digital power 1.8V nominal.
3
2
FRAME_VALID
LINE_VALID
Output
Output
29, 44
V
DD
Supply
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MT9M032_LDS_2 - Rev. B 11/07 EN
4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
Advance
MT9M032: 1/4.5-Inch 1.6Mp CMOS Digital Image Sensor
Signal Descriptions
Table 3:
Pin
Numbers
10, 11
7, 13, 18
32
6, 19
30, 31, 36,
39, 42, 43
8, 12, 17
9, 14, 15, 16
Signal Descriptions (continued)
Name
VAA_PIX
V
AA
V
DD
_PLL
V
DD
_IO
D
GND
A
GND
NC
Type
Supply
Supply
Supply
Supply
Supply
Supply
–
Pixel array power 2.8V nominal.
Analog power 2.8V nominal.
PLL power 2.8V nominal.
I/O power supply 2.8V nominal.
Digital ground.
Analog ground.
No connect.
Description
Figure 2:
48-Pin CLCC 10 x 10 Package Pinout Diagram (Top View)
FRAME_VALID
TRIGGER
LINE_VALID
STROBE
PIXCLK
V
DD
_IO
D
OUT
0
S
ADDR
0
45
D
OUT
1
D
OUT
2
6
5
4
3
2
1
48
47
4
6
V
DD
44
V
AA
A
GND
NC
VAA_PIX
VAA_PIX
A
GND
V
AA
NC
NC
NC
A
GND
V
AA
D
GND
43
42
41
40
39
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
D
GND
D
OUT
11
D
OUT
10
D
GND
D
OUT
9
D
OUT
6
D
GND
D
OUT
7
D
OUT
8
EXTCLK
V
DD
_PLL
D
GND
MT9M032
CLCC
Parallel
(Top View)
38
37
36
35
34
33
32
31
V
DD
_IO
SCLK
S
DATA
D
OUT
3
RESET_BAR
D
OUT
4
D
OUT
5
S
ADDR
1
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MT9M032_LDS_2 - Rev. B 11/07 EN
5
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2007 Micron Technology, Inc. All rights reserved.
D
GND
TEST
TEST
V
DD
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