Preliminary
SemiWell
Semiconductor
BTA12-600B
UL : E228720
Symbol
○
Bi-Directional Triode Thyristor
Features
Repetitive Peak Off-State Voltage : 600V
◆
R.M.S On-State Current ( I
T(RMS)
= 12 A )
◆
High Commutation dv/dt
◆
Isolation Voltage ( V
ISO
= 1500V AC )
◆
2.T2
▼
▲
○
3.Gate
1.T1
○
General Description
This device is fully isolated package suitable for AC switching
application, phase control application such as fan speed and
temperature modulation control, lighting control and static
switching relay.
This device is approved to comply with applicable require-
ments by Underwriters Laboratories Inc.
TO-220F
1
2
3
Absolute Maximum Ratings
Symbol
V
DRM
I
T(RMS)
I
TSM
I
2
t
P
GM
P
G(AV)
I
GM
V
GM
V
ISO
T
J
T
STG
( T
J
= 25°C unless otherwise specified )
Condition
Ratings
600
T
C
= 79 °C
One Cycle, 50Hz/60Hz, Peak,
Non-Repetitive
12
119/130
71
5.0
0.5
2.0
10
A.C. 1 minute
1500
- 40 ~ 125
- 40 ~ 150
2.0
Parameter
Repetitive Peak Off-State Voltage
R.M.S On-State Current
Surge On-State Current
I
2
t
Peak Gate Power Dissipation
Average Gate Power Dissipation
Peak Gate Current
Peak Gate Voltage
Isolation Breakdown Voltage(R.M.S.)
Operating Junction Temperature
Storage Temperature
Mass
Units
V
A
A
A
2
s
W
W
A
V
V
°C
°C
g
Mar, 2004. Rev. 0
copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
1/6
BTA12-600B
Electrical Characteristics
Symbol
Items
Repetitive Peak Off-State
Current
Peak On-State Voltage
Ⅰ
Ⅱ
Ⅲ
Ⅰ
Ⅱ
Ⅲ
Non-Trigger Gate Voltage
Critical Rate of Rise Off-State
Voltage at Commutation
Holding Current
Thermal Impedance
Junction to case
T
J
= 125 °C, V
D
= 1/2 V
DRM
T
J
= 125 °C, [di/dt]c = -6.0 A/ms,
V
D
=2/3 V
DRM
Gate Trigger Voltage
V
D
= 6 V, R
L
=10
Ω
Gate Trigger Current
V
D
= 6 V, R
L
=10
Ω
Conditions
V
D
= V
DRM
, Single Phase, Half Wave
T
J
= 125 °C
I
T
= 20 A, Inst. Measurement
Ratings
Min.
─
─
─
─
─
─
─
─
0.2
10
─
─
Typ.
─
─
─
─
─
─
─
─
─
─
20
─
Max.
2.0
1.4
30
30
30
1.5
1.5
1.5
─
─
─
3.3
Unit
I
DRM
V
TM
I
+GT1
I
-GT1
I
-GT3
V
+GT1
V
-GT1
V
-GT3
V
GD
(dv/dt)c
I
H
R
th(j-c)
mA
V
mA
V
V
V/㎲
mA
°C/W
2/6
BTA12-600B
Fig 1. Gate Characteristics
Fig 2. On-State Voltage
10
1
V
GM
(10V)
On-State Current [A]
10
2
Gate Voltage [V]
P
GM
(5W)
P
G(AV)
(0.5W)
25
℃
10
0
T
J
= 125 C
10
1
o
I
GM
(2A)
T
J
= 25 C
10
0
o
V
GD
(0.2V)
10
-1
10
1
10
2
10
3
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Gate Current [mA]
On-State Voltage [V]
Fig 3. On State Current vs.
Maximum Power Dissipation
16
14
Fig 4. On State Current vs.
Allowable Case Temperature
130
Power Dissipation [W]
π
θ
360°
θ
2
π
12
10
8
6
4
2
0
0
2
θ
= 180
o
θ
= 150
o
θ
= 120
θ
= 90
θ
= 60
θ
= 30
o
o
o
o
Allowable Case Temperature [
o
C]
120
110
θ
: Conduction Angle
100
π
90
θ
θ
= 30
2
π
o
o
θ
= 60
θ
θ
θ
θ
8
10
12
θ
360°
80
θ
: Conduction Angle
= 90
o
= 120
o
= 150
o
= 180
14
o
4
6
8
10
12
14
70
0
2
4
6
RMS On-State Current [A]
RMS On-State Current [A]
Fig 5. Surge On-State Current Rating
( Non-Repetitive )
200
Fig 6. Gate Trigger Voltage vs.
Junction Temperature
10
Surge On-State Current [A]
150
V
GT
(t C)
o
o
60Hz
100
V
GT
(25 C)
V
1
_
GT3
V
V
+
GT1
_
GT1
50
50Hz
0
0
10
10
1
10
2
0.1
-50
0
50
100
o
150
Time (cycles)
Junction Temperature [ C]
3/6
BTA12-600B
Fig 7. Gate Trigger Current vs.
Junction Temperature
10
10
Fig 8. Transient Thermal Impedance
1
I
I
+
GT1
_
GT1
Transient Thermal Impedance [ C/W]
I
GT
(25 C)
I
GT
(t C)
o
o
o
1
I
0.1
-50
_
GT3
0
50
100
o
150
0.1
-2
10
10
-1
10
0
10
1
10
2
Junction Temperature [ C]
Time (sec)
Fig 9. Gate Trigger Characteristics Test Circuit
10Ω
10Ω
10Ω
▼
▲
6V
●
▼
▲
A
●
▼
▲
A
●
6V
6V
A
V
●
R
G
V
●
R
G
V
●
R
G
Test Procedure
Ⅰ
Test Procedure
Ⅱ
Test Procedure
Ⅲ
4/6
BTA12-600B
TO-220F Package Dimension
mm
Typ.
Inch
Typ.
Dim.
A
B
C
D
E
F
G
H
I
J
K
L
M
N
O
Min.
10.4
6.18
9.55
13.47
6.05
1.26
3.17
1.87
2.57
Max.
10.6
6.44
9.81
13.73
6.15
1.36
3.43
2.13
2.83
Min.
0.409
0.243
0.376
0.530
0.238
0.050
0.125
0.074
0.101
Max.
0.417
0.254
0.386
0.540
0.242
0.054
0.135
0.084
0.111
2.54
5.08
2.51
1.25
0.45
0.6
3.7
3.2
1.5
2.62
1.55
0.63
1.0
0.099
0.049
0.018
0.024
0.100
0.200
0.103
0.061
0.025
0.039
0.146
0.126
0.059
φ
φ
1
φ
2
F
B
A
E
H
I
φ
φ
1
φ
2
C
L
1
D
2
3
J
K
M
G
1. T1
2. T2
3. Gate
N
O
5/6
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
